Commit graph

3262 commits

Author SHA1 Message Date
Merry
5353c5aa92 github: aarch64: Update packages 2022-12-10 18:27:13 +00:00
Merry
4fdc42182b backend/arm64/abi: Reserve registers for pagetable and fastmem arena 2022-12-07 00:41:35 +00:00
Merry
d6b58b268b arm64/emit_context: Add deferred_emits 2022-12-07 00:40:42 +00:00
merry
ac0a20795a emit_arm64_memory: Simplify interface to just require a bitsize 2022-12-06 15:45:16 +00:00
merry
f8d8618af1 emit_arm64: Passthrough pagetable information 2022-12-06 14:53:14 +00:00
merry
f69ae1c672 tests: dynarmic_test_generator also depends on A64 frontend 2022-12-06 14:50:37 +00:00
Merry
ec1f117665 backend/arm64: Merge memory handling 2022-12-05 22:34:00 +00:00
Merry
7660da4909 backend/arm64: Fix exclusive writes 2022-12-05 21:11:51 +00:00
Merry
bd570e093c 6.4.0 2022-12-03 21:11:36 +00:00
merry
a76a2fff53
Merge pull request #719 from liamwhite/a64
backend/arm64: A64 frontend
2022-12-03 17:09:03 +00:00
Merry
2c87e2f76f a64_address_space: Simplify 128-bit Q0->{X2,X3} transfer 2022-12-03 11:16:26 -05:00
Merry
6960d29868 a64_address_space: Remove fpsr load in step_code 2022-12-03 11:16:26 -05:00
Merry
4f1f7c8e97 arm64/reg_alloc: Remove PrepareForCallReg and PrepareForCallVec 2022-12-03 11:16:26 -05:00
Merry
73eecfbaef emit_arm64_vector_floating_point: Simplify FPVectorAbs16 2022-12-03 11:16:26 -05:00
Merry
cf704a460d EmitTwoOpFallbackWithoutRegAlloc: Simplify 2022-12-03 11:16:26 -05:00
Merry
6965095cb9 a64_address_space: Reorder declaration appropriately 2022-12-03 11:16:26 -05:00
Merry
c30ecd4d0b a64_address_space: Don't load fpsr here 2022-12-03 11:16:26 -05:00
Merry
8f9d1dbf4e address_space: Deduplicate {A32,A64}AddressSpace 2022-12-03 11:16:26 -05:00
Merry
0707aa3a04 emit_arm64: Remove is_a64 2022-12-03 11:16:26 -05:00
Merry
167ba85ce8 emit_arm64_a64: Implement A64GetCNTPCT 2022-12-03 11:16:26 -05:00
Merry
59ccccdc26 fixup 2022-12-03 11:16:26 -05:00
Merry
a3fc95204b fixup 2022-12-03 11:16:26 -05:00
Merry
3d6faf403b test_generator: Minor fixups 2022-12-03 11:16:26 -05:00
Merry
bcb5948ea2 GetNZCVFromOp: Ensure NZ00 2022-12-03 11:16:26 -05:00
Merry
890deb17ce test_generator: Expose interface 2022-12-03 11:16:26 -05:00
Merry
26cef90d81 reg_alloc: Q0 is scratch and needs to be moved 2022-12-03 11:16:26 -05:00
Merry
f7a092c06b emit_arm64_vector: Swap arguments of EmitSaturatedAccumulate 2022-12-03 11:16:26 -05:00
Merry
e74e03010b [TEST] test_generator: Test A64 2022-12-03 11:16:26 -05:00
Merry
01a9a12c84 test_generator: Filter out for unimplemented IR instructions 2022-12-03 11:16:26 -05:00
Merry
3fd19aac99 emit_arm64_floating_point: Implement ToOdd for FPDoubleToSingle 2022-12-03 11:16:26 -05:00
Merry
b26588123e a64_interface: Remove jit_interface member 2022-12-03 11:16:26 -05:00
Merry
46aef36a4f test_generator: A64 2022-12-03 11:16:26 -05:00
Liam
21b4211414 Add test for isolated GetNZCVFromOp 2022-12-03 11:16:26 -05:00
Liam
16101049f3 Fix EXTR (flipped rgister order) 2022-12-03 11:16:26 -05:00
Liam
7791d3d854 Fix GetCFlag 2022-12-03 11:16:26 -05:00
Liam
e02a999cad Add EmitTwoOpFallback and FRINT half fallback 2022-12-03 11:16:26 -05:00
Liam
6dea8c7875 Fix IC/DC, FABS 2022-12-03 11:16:26 -05:00
Liam
0df7dccf93 Fix vector fetch 2022-12-03 11:16:26 -05:00
Liam
6a14e6e73c Fix AndNot64 2022-12-03 11:16:26 -05:00
Liam
57871c5159 Fix 128-bit ops 2022-12-03 11:16:26 -05:00
Liam
ef2851d595 Optimize 2022-12-03 11:16:26 -05:00
Liam
48b0f6369b Add min/max 2022-12-03 11:16:26 -05:00
Liam
18e00f2e58 Implement ExtractRegister 2022-12-03 11:16:26 -05:00
Liam
b5f988379a Fix sets 2022-12-03 11:16:26 -05:00
Liam
bdc1b0f590 Implement *MULH 2022-12-03 11:16:26 -05:00
Liam
5b6e2add82 Add masked shift instructions 2022-12-03 11:16:26 -05:00
Liam
3f0c0c7b09 Impleemnt asr64, ror64 2022-12-03 11:16:26 -05:00
Liam
92ef9a7276 Add TestBit 2022-12-03 11:16:26 -05:00
Liam
e6949a86a2 Terminals 2022-12-03 11:16:26 -05:00
Liam
cdd658935c Fix compile 2022-12-03 11:16:26 -05:00