247 lines
6.9 KiB
C++
247 lines
6.9 KiB
C++
/* This file is part of the dynarmic project.
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* Copyright (c) 2018 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#include <array>
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#include <catch.hpp>
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#include <dynarmic/A64/a64.h>
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#include "common/assert.h"
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#include "common/common_types.h"
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class TestEnv final : public Dynarmic::A64::UserCallbacks {
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public:
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u64 ticks_left = 0;
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std::array<u32, 3000> code_mem{};
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std::uint32_t MemoryReadCode(u64 vaddr) override {
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if (vaddr < code_mem.size() * sizeof(u32)) {
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size_t index = vaddr / sizeof(u32);
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return code_mem[index];
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}
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return 0x14000000; // B .
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}
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std::uint8_t MemoryRead8(u64 vaddr) override { ASSERT_MSG(false, "MemoryRead8(%llx)", vaddr); }
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std::uint16_t MemoryRead16(u64 vaddr) override { ASSERT_MSG(false, "MemoryRead16(%llx)", vaddr); }
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std::uint32_t MemoryRead32(u64 vaddr) override { ASSERT_MSG(false, "MemoryRead32(%llx)", vaddr); }
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std::uint64_t MemoryRead64(u64 vaddr) override { ASSERT_MSG(false, "MemoryRead64(%llx)", vaddr); }
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void MemoryWrite8(u64 vaddr, std::uint8_t value) override { ASSERT_MSG(false, "MemoryWrite8(%llx, %hhi)", vaddr, value); }
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void MemoryWrite16(u64 vaddr, std::uint16_t value) override { ASSERT_MSG(false, "MemoryWrite16(%llx, %hi)", vaddr, value); }
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void MemoryWrite32(u64 vaddr, std::uint32_t value) override { ASSERT_MSG(false, "MemoryWrite32(%llx, %i)", vaddr, value); }
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void MemoryWrite64(u64 vaddr, std::uint64_t value) override { ASSERT_MSG(false, "MemoryWrite64(%llx, %lli)", vaddr, value); }
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void InterpreterFallback(u64 pc, size_t num_instructions) override { ASSERT_MSG(false, "InterpreterFallback(%llx, %zu)", pc, num_instructions); }
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void CallSVC(std::uint32_t swi) override { ASSERT_MSG(false, "CallSVC(%u)", swi); }
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void AddTicks(std::uint64_t ticks) override {
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if (ticks > ticks_left) {
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ticks_left = 0;
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return;
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}
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ticks_left -= ticks;
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}
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std::uint64_t GetTicksRemaining() override {
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return ticks_left;
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}
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};
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TEST_CASE("A64: ADD", "[a64]") {
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TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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env.code_mem[0] = 0x8b020020; // ADD X0, X1, X2
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env.code_mem[1] = 0x14000000; // B .
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jit.SetRegister(0, 0);
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jit.SetRegister(1, 1);
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jit.SetRegister(2, 2);
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jit.SetPC(0);
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env.ticks_left = 2;
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jit.Run();
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REQUIRE(jit.GetRegister(0) == 3);
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REQUIRE(jit.GetRegister(1) == 1);
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REQUIRE(jit.GetRegister(2) == 2);
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REQUIRE(jit.GetPC() == 4);
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}
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TEST_CASE("A64: AND", "[a64]") {
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TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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env.code_mem[0] = 0x8a020020; // AND X0, X1, X2
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env.code_mem[1] = 0x14000000; // B .
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jit.SetRegister(0, 0);
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jit.SetRegister(1, 1);
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jit.SetRegister(2, 3);
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jit.SetPC(0);
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env.ticks_left = 2;
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jit.Run();
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REQUIRE(jit.GetRegister(0) == 1);
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REQUIRE(jit.GetRegister(1) == 1);
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REQUIRE(jit.GetRegister(2) == 3);
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REQUIRE(jit.GetPC() == 4);
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}
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TEST_CASE("A64: Bitmasks", "[a64]") {
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TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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env.code_mem[0] = 0x3200c3e0; // ORR W0, WZR, #0x01010101
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env.code_mem[1] = 0x320c8fe1; // ORR W1, WZR, #0x00F000F0
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env.code_mem[2] = 0x320003e2; // ORR W2, WZR, #1
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env.code_mem[3] = 0x14000000; // B .
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jit.SetPC(0);
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env.ticks_left = 4;
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jit.Run();
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REQUIRE(jit.GetRegister(0) == 0x01010101);
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REQUIRE(jit.GetRegister(1) == 0x00F000F0);
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REQUIRE(jit.GetRegister(2) == 1);
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REQUIRE(jit.GetPC() == 12);
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}
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TEST_CASE("A64: ANDS NZCV", "[a64]") {
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TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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env.code_mem[0] = 0x6a020020; // ANDS W0, W1, W2
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env.code_mem[1] = 0x14000000; // B .
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SECTION("N=1, Z=0") {
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jit.SetRegister(0, 0);
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jit.SetRegister(1, 0xFFFFFFFF);
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jit.SetRegister(2, 0xFFFFFFFF);
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jit.SetPC(0);
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env.ticks_left = 2;
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jit.Run();
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REQUIRE(jit.GetRegister(0) == 0xFFFFFFFF);
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REQUIRE(jit.GetRegister(1) == 0xFFFFFFFF);
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REQUIRE(jit.GetRegister(2) == 0xFFFFFFFF);
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REQUIRE(jit.GetPC() == 4);
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REQUIRE((jit.GetPstate() & 0xF0000000) == 0x80000000);
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}
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SECTION("N=0, Z=1") {
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jit.SetRegister(0, 0);
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jit.SetRegister(1, 0xFFFFFFFF);
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jit.SetRegister(2, 0x00000000);
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jit.SetPC(0);
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env.ticks_left = 2;
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jit.Run();
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REQUIRE(jit.GetRegister(0) == 0x00000000);
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REQUIRE(jit.GetRegister(1) == 0xFFFFFFFF);
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REQUIRE(jit.GetRegister(2) == 0x00000000);
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REQUIRE(jit.GetPC() == 4);
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REQUIRE((jit.GetPstate() & 0xF0000000) == 0x40000000);
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}
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SECTION("N=0, Z=0") {
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jit.SetRegister(0, 0);
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jit.SetRegister(1, 0x12345678);
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jit.SetRegister(2, 0x7324a993);
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jit.SetPC(0);
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env.ticks_left = 2;
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jit.Run();
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REQUIRE(jit.GetRegister(0) == 0x12240010);
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REQUIRE(jit.GetRegister(1) == 0x12345678);
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REQUIRE(jit.GetRegister(2) == 0x7324a993);
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REQUIRE(jit.GetPC() == 4);
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REQUIRE((jit.GetPstate() & 0xF0000000) == 0x00000000);
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}
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}
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TEST_CASE("A64: CBZ", "[a64]") {
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TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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env.code_mem[0] = 0x34000060; // CBZ X0, label
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env.code_mem[1] = 0x320003e2; // MOV X2, 1
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env.code_mem[2] = 0x14000000; // B.
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env.code_mem[3] = 0x321f03e2; // label: MOV X2, 2
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env.code_mem[4] = 0x14000000; // B .
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SECTION("no branch") {
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jit.SetPC(0);
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jit.SetRegister(0, 1);
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env.ticks_left = 4;
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jit.Run();
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REQUIRE(jit.GetRegister(2) == 1);
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REQUIRE(jit.GetPC() == 8);
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}
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SECTION("branch") {
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jit.SetPC(0);
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jit.SetRegister(0, 0);
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env.ticks_left = 4;
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jit.Run();
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REQUIRE(jit.GetRegister(2) == 2);
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REQUIRE(jit.GetPC() == 16);
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}
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}
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TEST_CASE("A64: TBZ", "[a64]") {
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TestEnv env;
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Dynarmic::A64::Jit jit{Dynarmic::A64::UserConfig{&env}};
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env.code_mem[0] = 0x36180060; // TBZ X0, 3, label
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env.code_mem[1] = 0x320003e2; // MOV X2, 1
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env.code_mem[2] = 0x14000000; // B .
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env.code_mem[3] = 0x321f03e2; // label: MOV X2, 2
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env.code_mem[4] = 0x14000000; // B .
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SECTION("no branch") {
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jit.SetPC(0);
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jit.SetRegister(0, 0xFF);
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env.ticks_left = 4;
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jit.Run();
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REQUIRE(jit.GetRegister(2) == 1);
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REQUIRE(jit.GetPC() == 8);
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}
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SECTION("branch with zero") {
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jit.SetPC(0);
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jit.SetRegister(0, 0);
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env.ticks_left = 4;
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jit.Run();
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REQUIRE(jit.GetRegister(2) == 2);
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REQUIRE(jit.GetPC() == 16);
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}
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SECTION("branch with non-zero") {
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jit.SetPC(0);
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jit.SetRegister(0, 1);
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env.ticks_left = 4;
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jit.Run();
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REQUIRE(jit.GetRegister(2) == 2);
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REQUIRE(jit.GetPC() == 16);
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}
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}
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