324 lines
10 KiB
C++
324 lines
10 KiB
C++
/* This file is part of the dynarmic project.
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* Copyright (c) 2016 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#include <limits>
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#include "backend/x64/block_of_code.h"
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#include "backend/x64/emit_x64.h"
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#include "common/assert.h"
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#include "common/bit_util.h"
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#include "common/common_types.h"
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#include "common/mp/integer.h"
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#include "frontend/ir/basic_block.h"
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#include "frontend/ir/microinstruction.h"
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#include "frontend/ir/opcodes.h"
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namespace Dynarmic::BackendX64 {
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using namespace Xbyak::util;
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namespace mp = Dynarmic::Common::mp;
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namespace {
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enum class Op {
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Add,
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Sub,
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};
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template<Op op, size_t size>
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void EmitSignedSaturatedOp(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
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auto overflow_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetOverflowFromOp);
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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Xbyak::Reg result = ctx.reg_alloc.UseScratchGpr(args[0]);
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Xbyak::Reg addend = ctx.reg_alloc.UseGpr(args[1]);
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Xbyak::Reg overflow = ctx.reg_alloc.ScratchGpr();
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result.setBit(size);
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addend.setBit(size);
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overflow.setBit(size);
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constexpr u64 int_max = static_cast<u64>(std::numeric_limits<mp::signed_integer_of_size<size>>::max());
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if constexpr (size < 64) {
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code.xor_(overflow.cvt32(), overflow.cvt32());
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code.bt(result.cvt32(), size - 1);
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code.adc(overflow.cvt32(), int_max);
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} else {
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code.mov(overflow, int_max);
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code.bt(result, 63);
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code.adc(overflow, 0);
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}
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// overflow now contains 0x7F... if a was positive, or 0x80... if a was negative
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if constexpr (op == Op::Add) {
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code.add(result, addend);
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} else {
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code.sub(result, addend);
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}
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if constexpr (size < 64) {
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code.cmovo(result.cvt32(), overflow.cvt32());
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} else {
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code.cmovo(result, overflow);
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}
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if (overflow_inst) {
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code.seto(overflow.cvt8());
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ctx.reg_alloc.DefineValue(overflow_inst, overflow);
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ctx.EraseInstruction(overflow_inst);
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}
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ctx.reg_alloc.DefineValue(inst, result);
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}
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template<Op op, size_t size>
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void EmitUnsignedSaturatedOp(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
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auto overflow_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetOverflowFromOp);
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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Xbyak::Reg op_result = ctx.reg_alloc.UseScratchGpr(args[0]);
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Xbyak::Reg addend = ctx.reg_alloc.UseScratchGpr(args[1]);
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op_result.setBit(size);
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addend.setBit(size);
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if constexpr (op == Op::Add) {
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code.add(op_result, addend);
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} else {
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code.sub(op_result, addend);
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}
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constexpr u64 boundary = op == Op::Add ? std::numeric_limits<mp::unsigned_integer_of_size<size>>::max()
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: 0;
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code.mov(addend, boundary);
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if constexpr (size < 64) {
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code.cmovae(addend.cvt32(), op_result.cvt32());
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} else {
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code.cmovae(addend, op_result);
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}
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if (overflow_inst) {
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const Xbyak::Reg overflow = ctx.reg_alloc.ScratchGpr();
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code.setb(overflow.cvt8());
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ctx.reg_alloc.DefineValue(overflow_inst, overflow);
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ctx.EraseInstruction(overflow_inst);
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}
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ctx.reg_alloc.DefineValue(inst, addend);
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}
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} // anonymous namespace
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void EmitX64::EmitSignedSaturatedAdd8(EmitContext& ctx, IR::Inst* inst) {
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EmitSignedSaturatedOp<Op::Add, 8>(code, ctx, inst);
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}
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void EmitX64::EmitSignedSaturatedAdd16(EmitContext& ctx, IR::Inst* inst) {
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EmitSignedSaturatedOp<Op::Add, 16>(code, ctx, inst);
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}
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void EmitX64::EmitSignedSaturatedAdd32(EmitContext& ctx, IR::Inst* inst) {
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EmitSignedSaturatedOp<Op::Add, 32>(code, ctx, inst);
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}
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void EmitX64::EmitSignedSaturatedAdd64(EmitContext& ctx, IR::Inst* inst) {
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EmitSignedSaturatedOp<Op::Add, 64>(code, ctx, inst);
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}
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void EmitX64::EmitSignedSaturatedDoublingMultiplyReturnHigh16(EmitContext& ctx, IR::Inst* inst) {
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auto overflow_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetOverflowFromOp);
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const Xbyak::Reg32 x = ctx.reg_alloc.UseScratchGpr(args[0]).cvt32();
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const Xbyak::Reg32 y = ctx.reg_alloc.UseScratchGpr(args[1]).cvt32();
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const Xbyak::Reg32 tmp = ctx.reg_alloc.ScratchGpr().cvt32();
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code.movsx(x, x.cvt16());
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code.movsx(y, y.cvt16());
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code.imul(x, y);
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code.lea(y, ptr[x.cvt64() + x.cvt64()]);
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code.mov(tmp, x);
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code.shr(tmp, 15);
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code.xor_(y, x);
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code.mov(y, 0x7FFF);
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code.cmovns(y, tmp);
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if (overflow_inst) {
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code.sets(tmp.cvt8());
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ctx.reg_alloc.DefineValue(overflow_inst, tmp);
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ctx.EraseInstruction(overflow_inst);
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}
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ctx.reg_alloc.DefineValue(inst, y);
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}
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void EmitX64::EmitSignedSaturatedDoublingMultiplyReturnHigh32(EmitContext& ctx, IR::Inst* inst) {
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auto overflow_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetOverflowFromOp);
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const Xbyak::Reg64 x = ctx.reg_alloc.UseScratchGpr(args[0]);
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const Xbyak::Reg64 y = ctx.reg_alloc.UseScratchGpr(args[1]);
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const Xbyak::Reg64 tmp = ctx.reg_alloc.ScratchGpr();
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code.movsxd(x, x.cvt32());
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code.movsxd(y, y.cvt32());
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code.imul(x, y);
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code.lea(y, ptr[x + x]);
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code.mov(tmp, x);
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code.shr(tmp, 31);
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code.xor_(y, x);
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code.mov(y.cvt32(), 0x7FFFFFFF);
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code.cmovns(y.cvt32(), tmp.cvt32());
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if (overflow_inst) {
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code.sets(tmp.cvt8());
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ctx.reg_alloc.DefineValue(overflow_inst, tmp);
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ctx.EraseInstruction(overflow_inst);
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}
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ctx.reg_alloc.DefineValue(inst, y);
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}
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void EmitX64::EmitSignedSaturatedSub8(EmitContext& ctx, IR::Inst* inst) {
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EmitSignedSaturatedOp<Op::Sub, 8>(code, ctx, inst);
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}
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void EmitX64::EmitSignedSaturatedSub16(EmitContext& ctx, IR::Inst* inst) {
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EmitSignedSaturatedOp<Op::Sub, 16>(code, ctx, inst);
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}
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void EmitX64::EmitSignedSaturatedSub32(EmitContext& ctx, IR::Inst* inst) {
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EmitSignedSaturatedOp<Op::Sub, 32>(code, ctx, inst);
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}
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void EmitX64::EmitSignedSaturatedSub64(EmitContext& ctx, IR::Inst* inst) {
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EmitSignedSaturatedOp<Op::Sub, 64>(code, ctx, inst);
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}
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void EmitX64::EmitSignedSaturation(EmitContext& ctx, IR::Inst* inst) {
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auto overflow_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetOverflowFromOp);
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const size_t N = args[1].GetImmediateU8();
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ASSERT(N >= 1 && N <= 32);
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if (N == 32) {
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if (overflow_inst) {
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const auto no_overflow = IR::Value(false);
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overflow_inst->ReplaceUsesWith(no_overflow);
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}
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ctx.reg_alloc.DefineValue(inst, args[0]);
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return;
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}
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const u32 mask = (1u << N) - 1;
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const u32 positive_saturated_value = (1u << (N - 1)) - 1;
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const u32 negative_saturated_value = 1u << (N - 1);
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const u32 sext_negative_satured_value = Common::SignExtend(N, negative_saturated_value);
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const Xbyak::Reg32 result = ctx.reg_alloc.ScratchGpr().cvt32();
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const Xbyak::Reg32 reg_a = ctx.reg_alloc.UseGpr(args[0]).cvt32();
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const Xbyak::Reg32 overflow = ctx.reg_alloc.ScratchGpr().cvt32();
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const Xbyak::Reg32 tmp = ctx.reg_alloc.ScratchGpr().cvt32();
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// overflow now contains a value between 0 and mask if it was originally between {negative,positive}_saturated_value.
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code.lea(overflow, code.ptr[reg_a.cvt64() + negative_saturated_value]);
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// Put the appropriate saturated value in result
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code.cmp(reg_a, positive_saturated_value);
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code.mov(tmp, positive_saturated_value);
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code.mov(result, sext_negative_satured_value);
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code.cmovg(result, tmp);
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// Do the saturation
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code.cmp(overflow, mask);
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code.cmovbe(result, reg_a);
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if (overflow_inst) {
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code.seta(overflow.cvt8());
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ctx.reg_alloc.DefineValue(overflow_inst, overflow);
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ctx.EraseInstruction(overflow_inst);
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}
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ctx.reg_alloc.DefineValue(inst, result);
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}
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void EmitX64::EmitUnsignedSaturatedAdd8(EmitContext& ctx, IR::Inst* inst) {
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EmitUnsignedSaturatedOp<Op::Add, 8>(code, ctx, inst);
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}
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void EmitX64::EmitUnsignedSaturatedAdd16(EmitContext& ctx, IR::Inst* inst) {
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EmitUnsignedSaturatedOp<Op::Add, 16>(code, ctx, inst);
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}
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void EmitX64::EmitUnsignedSaturatedAdd32(EmitContext& ctx, IR::Inst* inst) {
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EmitUnsignedSaturatedOp<Op::Add, 32>(code, ctx, inst);
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}
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void EmitX64::EmitUnsignedSaturatedAdd64(EmitContext& ctx, IR::Inst* inst) {
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EmitUnsignedSaturatedOp<Op::Add, 64>(code, ctx, inst);
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}
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void EmitX64::EmitUnsignedSaturatedSub8(EmitContext& ctx, IR::Inst* inst) {
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EmitUnsignedSaturatedOp<Op::Sub, 8>(code, ctx, inst);
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}
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void EmitX64::EmitUnsignedSaturatedSub16(EmitContext& ctx, IR::Inst* inst) {
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EmitUnsignedSaturatedOp<Op::Sub, 16>(code, ctx, inst);
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}
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void EmitX64::EmitUnsignedSaturatedSub32(EmitContext& ctx, IR::Inst* inst) {
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EmitUnsignedSaturatedOp<Op::Sub, 32>(code, ctx, inst);
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}
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void EmitX64::EmitUnsignedSaturatedSub64(EmitContext& ctx, IR::Inst* inst) {
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EmitUnsignedSaturatedOp<Op::Sub, 64>(code, ctx, inst);
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}
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void EmitX64::EmitUnsignedSaturation(EmitContext& ctx, IR::Inst* inst) {
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auto overflow_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetOverflowFromOp);
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const size_t N = args[1].GetImmediateU8();
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ASSERT(N <= 31);
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const u32 saturated_value = (1u << N) - 1;
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const Xbyak::Reg32 result = ctx.reg_alloc.ScratchGpr().cvt32();
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const Xbyak::Reg32 reg_a = ctx.reg_alloc.UseGpr(args[0]).cvt32();
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const Xbyak::Reg32 overflow = ctx.reg_alloc.ScratchGpr().cvt32();
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// Pseudocode: result = clamp(reg_a, 0, saturated_value);
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code.xor_(overflow, overflow);
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code.cmp(reg_a, saturated_value);
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code.mov(result, saturated_value);
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code.cmovle(result, overflow);
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code.cmovbe(result, reg_a);
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if (overflow_inst) {
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code.seta(overflow.cvt8());
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ctx.reg_alloc.DefineValue(overflow_inst, overflow);
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ctx.EraseInstruction(overflow_inst);
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}
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ctx.reg_alloc.DefineValue(inst, result);
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}
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} // namespace Dynarmic::BackendX64
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