8042dc93e8
0140eeff Merge branch 'dev' 1efe14b2 change the original behavior of SetError 83c89c7a rename and fix indent 8be7ca93 Merge branch 'sbogusev-master' into dev 070b4c09 make l_err() inline with block scope static TLS l_error 9a4e6579 v5.97 d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu bb967ae7 replace uint32 with uint32_t etc. c306b8e5 update to v5.95 605e4224 use noexcept if C++11 or later 7a17c2c8 remove warning 5dfa4462 use constexpr if c++14 or later 18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev 3966ba9d fix mov interface be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t d9696b54 Merge pull request #102 from igorsafo/master ea73267f Cpu: make getNumCores constant ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported 0c4eafc3 use thread_local for XBYAK_TLS when supported c1aea35e CodeGenerator::reset() calls ClearError() b4df97b1 Merge branch 'cursey-no-winsock2-header' 6a47bb0e v5.94 9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h 42dddb74 Remove #include <winsock2.h> 615b85fa update doc 9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION 7cdf227f use static to avoid multiple instance 38a28dec test_nm.bat supports noexcept 0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions eda6e2a3 v5.92 5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64 6208e3ae throw exception if not supported amx sibmem 2 c6737d14 mov amx insts from avx512 34ea5c16 throw exception if not supported amx sibmem 6f93fe35 fix test of sizeof(Operand) 5b89c3b2 remove T_TMM 5ce32858 gen_amx.cpp is merged into gen_avx512.cpp fe4f965f remove my alias for tmm registers 92f904d8 bit_ contains 8192 98b51da9 extend mnemonics with Intel(R) AMX ISA 8d1b4c9e add generation of Intel(R) AMX ISA mnemonics 8ded45d1 add support of Intel(R) AMX ISA b23c4b02 v5.912 ffe32a60 Merge branch 'rsdubtso-master' e7b7fd2f use MAP_JIT on macOS regardless of Xcode version 82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined 2f6d9e34 fix test for mac a7d10a1e add link to GitHub Sponsor 96076265 accept k0 mask register (it means no mask) 7e3167e4 kmov{b,w,d,q} throws for unsupported reg f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1 dc9e6a79 Possibility to specify a different PREFIX 5fc69fc8 remove warning of test e69e0b42 fix typo of type of Zmi 34f797e8 perf does not recognize too short function name 6cc0f4df Consider max defined as a macro on Windows 5722393d fix for zeroed-out 0xb leaf 6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc' 47922ed9 Fix segmentation fault in calc sample 8f696e93 add test_avx512 to bat 00114d79 add .travis.yml a29fa27b refactor test 508b543c fix error of vfpclasspd 0d54f1b1 fix for windows 4da8fd4e add setDefaultJmpNEAR da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined 7dac9f61 update to v5.85 fe639332 enable MAP_JIT only if mojave or later 4443d791 specify MAP_JIT mmap flag on macOS 20ee4c2d update doc ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined f32836da remove exit(1) a1e9adf2 v5.82 08b8b1ba Support AMD Zen New Instructions. 2501ba9a remove *.user and *.vcproj 5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng' 35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification" 4a6c59bb address a conflict of sharing intermediate directory by different projects 9577cbf3 inherit "some output locations" from parent or project defaults 6c5f7186 upgrade projects from VS2018 to VS2017 4ca0434b v5.81 72b4e95d add lds/lss/les/lfs/lgs cc8f037c fix ; move ERR_INTERNAL to the end 9e9ec1c3 add repe, repne, repne, prez eea0edc3 add some fpu mnemonics 06235fa6 add loop/loope/loopne 7fc0c2bb add enter/leave 9fa2ef3c add in_, out_ df208648 add lods{b,w,d,q}, outs{b,w,d} 4672d2cb add int3, int_, into 431977cb add pushfq, popfq 81c4749f syscall, sysenter, sysexit, sysret 1f1b53c4 add clflushopt, fldenv, fnstw b765db33 Profiler uses append mode 44dc3546 add Profiler class 42949334 update version to v5.802 91cb919b Merge branch 'vpirogov-master' a6452f82 fixed avx512_bf16 detection f41da5aa tweak ; vcvtneps2bf16 calls opCvt2 b12460ba [sample] fix typo of quantize.cpp b22f5881 add set_opt.bat for test on Windows f402faad add vp2intersectd/vp2intersectq 4cfd5208 add avx512_bf16 4033564c fix vcmppd/vcmpps for ptr_b git-subtree-dir: externals/xbyak git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
902 lines
26 KiB
C++
902 lines
26 KiB
C++
#ifndef XBYAK_XBYAK_UTIL_H_
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#define XBYAK_XBYAK_UTIL_H_
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#ifdef XBYAK_ONLY_CLASS_CPU
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#include <stdint.h>
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#include <stdlib.h>
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#include <algorithm>
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#include <assert.h>
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#ifndef XBYAK_THROW
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#define XBYAK_THROW(x) ;
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#define XBYAK_THROW_RET(x, y) return y;
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#endif
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#else
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#include <string.h>
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/**
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utility class and functions for Xbyak
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Xbyak::util::Clock ; rdtsc timer
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Xbyak::util::Cpu ; detect CPU
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@note this header is UNDER CONSTRUCTION!
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*/
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#include "xbyak.h"
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#endif // XBYAK_ONLY_CLASS_CPU
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#if defined(__i386__) || defined(__x86_64__) || defined(_M_IX86) || defined(_M_X64)
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#define XBYAK_INTEL_CPU_SPECIFIC
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#endif
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#ifdef XBYAK_INTEL_CPU_SPECIFIC
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#ifdef _MSC_VER
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#if (_MSC_VER < 1400) && defined(XBYAK32)
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static inline __declspec(naked) void __cpuid(int[4], int)
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{
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__asm {
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push ebx
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push esi
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mov eax, dword ptr [esp + 4 * 2 + 8] // eaxIn
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cpuid
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mov esi, dword ptr [esp + 4 * 2 + 4] // data
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mov dword ptr [esi], eax
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mov dword ptr [esi + 4], ebx
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mov dword ptr [esi + 8], ecx
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mov dword ptr [esi + 12], edx
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pop esi
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pop ebx
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ret
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}
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}
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#else
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#include <intrin.h> // for __cpuid
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#endif
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#else
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#ifndef __GNUC_PREREQ
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#define __GNUC_PREREQ(major, minor) ((((__GNUC__) << 16) + (__GNUC_MINOR__)) >= (((major) << 16) + (minor)))
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#endif
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#if __GNUC_PREREQ(4, 3) && !defined(__APPLE__)
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#include <cpuid.h>
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#else
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#if defined(__APPLE__) && defined(XBYAK32) // avoid err : can't find a register in class `BREG' while reloading `asm'
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#define __cpuid(eaxIn, a, b, c, d) __asm__ __volatile__("pushl %%ebx\ncpuid\nmovl %%ebp, %%esi\npopl %%ebx" : "=a"(a), "=S"(b), "=c"(c), "=d"(d) : "0"(eaxIn))
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#define __cpuid_count(eaxIn, ecxIn, a, b, c, d) __asm__ __volatile__("pushl %%ebx\ncpuid\nmovl %%ebp, %%esi\npopl %%ebx" : "=a"(a), "=S"(b), "=c"(c), "=d"(d) : "0"(eaxIn), "2"(ecxIn))
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#else
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#define __cpuid(eaxIn, a, b, c, d) __asm__ __volatile__("cpuid\n" : "=a"(a), "=b"(b), "=c"(c), "=d"(d) : "0"(eaxIn))
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#define __cpuid_count(eaxIn, ecxIn, a, b, c, d) __asm__ __volatile__("cpuid\n" : "=a"(a), "=b"(b), "=c"(c), "=d"(d) : "0"(eaxIn), "2"(ecxIn))
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#endif
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#endif
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#endif
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#endif
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#ifdef XBYAK_USE_VTUNE
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// -I /opt/intel/vtune_amplifier/include/ -L /opt/intel/vtune_amplifier/lib64 -ljitprofiling -ldl
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#include <jitprofiling.h>
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#ifdef _MSC_VER
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#pragma comment(lib, "libittnotify.lib")
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#endif
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#ifdef __linux__
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#include <dlfcn.h>
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#endif
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#endif
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#ifdef __linux__
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#define XBYAK_USE_PERF
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#endif
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namespace Xbyak { namespace util {
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typedef enum {
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SmtLevel = 1,
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CoreLevel = 2
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} IntelCpuTopologyLevel;
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/**
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CPU detection class
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*/
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class Cpu {
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uint64_t type_;
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//system topology
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bool x2APIC_supported_;
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static const size_t maxTopologyLevels = 2;
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unsigned int numCores_[maxTopologyLevels];
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static const unsigned int maxNumberCacheLevels = 10;
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unsigned int dataCacheSize_[maxNumberCacheLevels];
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unsigned int coresSharignDataCache_[maxNumberCacheLevels];
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unsigned int dataCacheLevels_;
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unsigned int get32bitAsBE(const char *x) const
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{
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return x[0] | (x[1] << 8) | (x[2] << 16) | (x[3] << 24);
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}
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unsigned int mask(int n) const
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{
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return (1U << n) - 1;
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}
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void setFamily()
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{
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unsigned int data[4] = {};
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getCpuid(1, data);
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stepping = data[0] & mask(4);
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model = (data[0] >> 4) & mask(4);
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family = (data[0] >> 8) & mask(4);
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// type = (data[0] >> 12) & mask(2);
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extModel = (data[0] >> 16) & mask(4);
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extFamily = (data[0] >> 20) & mask(8);
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if (family == 0x0f) {
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displayFamily = family + extFamily;
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} else {
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displayFamily = family;
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}
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if (family == 6 || family == 0x0f) {
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displayModel = (extModel << 4) + model;
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} else {
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displayModel = model;
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}
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}
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unsigned int extractBit(unsigned int val, unsigned int base, unsigned int end)
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{
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return (val >> base) & ((1u << (end - base)) - 1);
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}
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void setNumCores()
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{
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if ((type_ & tINTEL) == 0) return;
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unsigned int data[4] = {};
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/* CAUTION: These numbers are configuration as shipped by Intel. */
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getCpuidEx(0x0, 0, data);
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if (data[0] >= 0xB) {
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/*
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if leaf 11 exists(x2APIC is supported),
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we use it to get the number of smt cores and cores on socket
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leaf 0xB can be zeroed-out by a hypervisor
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*/
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x2APIC_supported_ = true;
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for (unsigned int i = 0; i < maxTopologyLevels; i++) {
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getCpuidEx(0xB, i, data);
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IntelCpuTopologyLevel level = (IntelCpuTopologyLevel)extractBit(data[2], 8, 15);
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if (level == SmtLevel || level == CoreLevel) {
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numCores_[level - 1] = extractBit(data[1], 0, 15);
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}
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}
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/*
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Fallback values in case a hypervisor has 0xB leaf zeroed-out.
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*/
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numCores_[SmtLevel - 1] = (std::max)(1u, numCores_[SmtLevel - 1]);
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numCores_[CoreLevel - 1] = (std::max)(numCores_[SmtLevel - 1], numCores_[CoreLevel - 1]);
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} else {
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/*
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Failed to deremine num of cores without x2APIC support.
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TODO: USE initial APIC ID to determine ncores.
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*/
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numCores_[SmtLevel - 1] = 0;
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numCores_[CoreLevel - 1] = 0;
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}
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}
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void setCacheHierarchy()
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{
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if ((type_ & tINTEL) == 0) return;
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const unsigned int NO_CACHE = 0;
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const unsigned int DATA_CACHE = 1;
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// const unsigned int INSTRUCTION_CACHE = 2;
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const unsigned int UNIFIED_CACHE = 3;
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unsigned int smt_width = 0;
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unsigned int logical_cores = 0;
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unsigned int data[4] = {};
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if (x2APIC_supported_) {
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smt_width = numCores_[0];
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logical_cores = numCores_[1];
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}
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/*
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Assumptions:
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the first level of data cache is not shared (which is the
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case for every existing architecture) and use this to
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determine the SMT width for arch not supporting leaf 11.
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when leaf 4 reports a number of core less than numCores_
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on socket reported by leaf 11, then it is a correct number
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of cores not an upperbound.
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*/
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for (int i = 0; dataCacheLevels_ < maxNumberCacheLevels; i++) {
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getCpuidEx(0x4, i, data);
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unsigned int cacheType = extractBit(data[0], 0, 4);
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if (cacheType == NO_CACHE) break;
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if (cacheType == DATA_CACHE || cacheType == UNIFIED_CACHE) {
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unsigned int actual_logical_cores = extractBit(data[0], 14, 25) + 1;
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if (logical_cores != 0) { // true only if leaf 0xB is supported and valid
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actual_logical_cores = (std::min)(actual_logical_cores, logical_cores);
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}
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assert(actual_logical_cores != 0);
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dataCacheSize_[dataCacheLevels_] =
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(extractBit(data[1], 22, 31) + 1)
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* (extractBit(data[1], 12, 21) + 1)
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* (extractBit(data[1], 0, 11) + 1)
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* (data[2] + 1);
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if (cacheType == DATA_CACHE && smt_width == 0) smt_width = actual_logical_cores;
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assert(smt_width != 0);
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coresSharignDataCache_[dataCacheLevels_] = (std::max)(actual_logical_cores / smt_width, 1u);
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dataCacheLevels_++;
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}
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}
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}
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public:
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int model;
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int family;
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int stepping;
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int extModel;
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int extFamily;
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int displayFamily; // family + extFamily
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int displayModel; // model + extModel
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unsigned int getNumCores(IntelCpuTopologyLevel level) const {
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if (!x2APIC_supported_) XBYAK_THROW_RET(ERR_X2APIC_IS_NOT_SUPPORTED, 0)
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switch (level) {
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case SmtLevel: return numCores_[level - 1];
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case CoreLevel: return numCores_[level - 1] / numCores_[SmtLevel - 1];
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default: XBYAK_THROW_RET(ERR_X2APIC_IS_NOT_SUPPORTED, 0)
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}
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}
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unsigned int getDataCacheLevels() const { return dataCacheLevels_; }
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unsigned int getCoresSharingDataCache(unsigned int i) const
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{
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if (i >= dataCacheLevels_) XBYAK_THROW_RET(ERR_BAD_PARAMETER, 0)
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return coresSharignDataCache_[i];
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}
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unsigned int getDataCacheSize(unsigned int i) const
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{
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if (i >= dataCacheLevels_) XBYAK_THROW_RET(ERR_BAD_PARAMETER, 0)
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return dataCacheSize_[i];
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}
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/*
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data[] = { eax, ebx, ecx, edx }
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*/
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static inline void getCpuid(unsigned int eaxIn, unsigned int data[4])
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{
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#ifdef XBYAK_INTEL_CPU_SPECIFIC
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#ifdef _MSC_VER
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__cpuid(reinterpret_cast<int*>(data), eaxIn);
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#else
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__cpuid(eaxIn, data[0], data[1], data[2], data[3]);
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#endif
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#else
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(void)eaxIn;
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(void)data;
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#endif
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}
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static inline void getCpuidEx(unsigned int eaxIn, unsigned int ecxIn, unsigned int data[4])
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{
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#ifdef XBYAK_INTEL_CPU_SPECIFIC
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#ifdef _MSC_VER
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__cpuidex(reinterpret_cast<int*>(data), eaxIn, ecxIn);
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#else
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__cpuid_count(eaxIn, ecxIn, data[0], data[1], data[2], data[3]);
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#endif
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#else
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(void)eaxIn;
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(void)ecxIn;
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(void)data;
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#endif
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}
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static inline uint64_t getXfeature()
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{
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#ifdef XBYAK_INTEL_CPU_SPECIFIC
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#ifdef _MSC_VER
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return _xgetbv(0);
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#else
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unsigned int eax, edx;
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// xgetvb is not support on gcc 4.2
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// __asm__ volatile("xgetbv" : "=a"(eax), "=d"(edx) : "c"(0));
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__asm__ volatile(".byte 0x0f, 0x01, 0xd0" : "=a"(eax), "=d"(edx) : "c"(0));
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return ((uint64_t)edx << 32) | eax;
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#endif
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#else
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return 0;
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#endif
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}
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typedef uint64_t Type;
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static const Type NONE = 0;
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static const Type tMMX = 1 << 0;
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static const Type tMMX2 = 1 << 1;
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static const Type tCMOV = 1 << 2;
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static const Type tSSE = 1 << 3;
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static const Type tSSE2 = 1 << 4;
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static const Type tSSE3 = 1 << 5;
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static const Type tSSSE3 = 1 << 6;
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static const Type tSSE41 = 1 << 7;
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static const Type tSSE42 = 1 << 8;
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static const Type tPOPCNT = 1 << 9;
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static const Type tAESNI = 1 << 10;
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static const Type tSSE5 = 1 << 11;
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static const Type tOSXSAVE = 1 << 12;
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static const Type tPCLMULQDQ = 1 << 13;
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static const Type tAVX = 1 << 14;
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static const Type tFMA = 1 << 15;
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static const Type t3DN = 1 << 16;
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static const Type tE3DN = 1 << 17;
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static const Type tSSE4a = 1 << 18;
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static const Type tRDTSCP = 1 << 19;
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static const Type tAVX2 = 1 << 20;
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static const Type tBMI1 = 1 << 21; // andn, bextr, blsi, blsmsk, blsr, tzcnt
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static const Type tBMI2 = 1 << 22; // bzhi, mulx, pdep, pext, rorx, sarx, shlx, shrx
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static const Type tLZCNT = 1 << 23;
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static const Type tINTEL = 1 << 24;
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static const Type tAMD = 1 << 25;
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static const Type tENHANCED_REP = 1 << 26; // enhanced rep movsb/stosb
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static const Type tRDRAND = 1 << 27;
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static const Type tADX = 1 << 28; // adcx, adox
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static const Type tRDSEED = 1 << 29; // rdseed
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static const Type tSMAP = 1 << 30; // stac
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static const Type tHLE = uint64_t(1) << 31; // xacquire, xrelease, xtest
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static const Type tRTM = uint64_t(1) << 32; // xbegin, xend, xabort
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static const Type tF16C = uint64_t(1) << 33; // vcvtph2ps, vcvtps2ph
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static const Type tMOVBE = uint64_t(1) << 34; // mobve
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static const Type tAVX512F = uint64_t(1) << 35;
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static const Type tAVX512DQ = uint64_t(1) << 36;
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static const Type tAVX512_IFMA = uint64_t(1) << 37;
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static const Type tAVX512IFMA = tAVX512_IFMA;
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static const Type tAVX512PF = uint64_t(1) << 38;
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static const Type tAVX512ER = uint64_t(1) << 39;
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static const Type tAVX512CD = uint64_t(1) << 40;
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static const Type tAVX512BW = uint64_t(1) << 41;
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static const Type tAVX512VL = uint64_t(1) << 42;
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static const Type tAVX512_VBMI = uint64_t(1) << 43;
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static const Type tAVX512VBMI = tAVX512_VBMI; // changed by Intel's manual
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static const Type tAVX512_4VNNIW = uint64_t(1) << 44;
|
|
static const Type tAVX512_4FMAPS = uint64_t(1) << 45;
|
|
static const Type tPREFETCHWT1 = uint64_t(1) << 46;
|
|
static const Type tPREFETCHW = uint64_t(1) << 47;
|
|
static const Type tSHA = uint64_t(1) << 48;
|
|
static const Type tMPX = uint64_t(1) << 49;
|
|
static const Type tAVX512_VBMI2 = uint64_t(1) << 50;
|
|
static const Type tGFNI = uint64_t(1) << 51;
|
|
static const Type tVAES = uint64_t(1) << 52;
|
|
static const Type tVPCLMULQDQ = uint64_t(1) << 53;
|
|
static const Type tAVX512_VNNI = uint64_t(1) << 54;
|
|
static const Type tAVX512_BITALG = uint64_t(1) << 55;
|
|
static const Type tAVX512_VPOPCNTDQ = uint64_t(1) << 56;
|
|
static const Type tAVX512_BF16 = uint64_t(1) << 57;
|
|
static const Type tAVX512_VP2INTERSECT = uint64_t(1) << 58;
|
|
static const Type tAMX_TILE = uint64_t(1) << 59;
|
|
static const Type tAMX_INT8 = uint64_t(1) << 60;
|
|
static const Type tAMX_BF16 = uint64_t(1) << 61;
|
|
|
|
Cpu()
|
|
: type_(NONE)
|
|
, x2APIC_supported_(false)
|
|
, numCores_()
|
|
, dataCacheSize_()
|
|
, coresSharignDataCache_()
|
|
, dataCacheLevels_(0)
|
|
{
|
|
unsigned int data[4] = {};
|
|
const unsigned int& EAX = data[0];
|
|
const unsigned int& EBX = data[1];
|
|
const unsigned int& ECX = data[2];
|
|
const unsigned int& EDX = data[3];
|
|
getCpuid(0, data);
|
|
const unsigned int maxNum = EAX;
|
|
static const char intel[] = "ntel";
|
|
static const char amd[] = "cAMD";
|
|
if (ECX == get32bitAsBE(amd)) {
|
|
type_ |= tAMD;
|
|
getCpuid(0x80000001, data);
|
|
if (EDX & (1U << 31)) type_ |= t3DN;
|
|
if (EDX & (1U << 15)) type_ |= tCMOV;
|
|
if (EDX & (1U << 30)) type_ |= tE3DN;
|
|
if (EDX & (1U << 22)) type_ |= tMMX2;
|
|
if (EDX & (1U << 27)) type_ |= tRDTSCP;
|
|
}
|
|
if (ECX == get32bitAsBE(intel)) {
|
|
type_ |= tINTEL;
|
|
getCpuid(0x80000001, data);
|
|
if (EDX & (1U << 27)) type_ |= tRDTSCP;
|
|
if (ECX & (1U << 5)) type_ |= tLZCNT;
|
|
if (ECX & (1U << 8)) type_ |= tPREFETCHW;
|
|
}
|
|
getCpuid(1, data);
|
|
if (ECX & (1U << 0)) type_ |= tSSE3;
|
|
if (ECX & (1U << 9)) type_ |= tSSSE3;
|
|
if (ECX & (1U << 19)) type_ |= tSSE41;
|
|
if (ECX & (1U << 20)) type_ |= tSSE42;
|
|
if (ECX & (1U << 22)) type_ |= tMOVBE;
|
|
if (ECX & (1U << 23)) type_ |= tPOPCNT;
|
|
if (ECX & (1U << 25)) type_ |= tAESNI;
|
|
if (ECX & (1U << 1)) type_ |= tPCLMULQDQ;
|
|
if (ECX & (1U << 27)) type_ |= tOSXSAVE;
|
|
if (ECX & (1U << 30)) type_ |= tRDRAND;
|
|
if (ECX & (1U << 29)) type_ |= tF16C;
|
|
|
|
if (EDX & (1U << 15)) type_ |= tCMOV;
|
|
if (EDX & (1U << 23)) type_ |= tMMX;
|
|
if (EDX & (1U << 25)) type_ |= tMMX2 | tSSE;
|
|
if (EDX & (1U << 26)) type_ |= tSSE2;
|
|
|
|
if (type_ & tOSXSAVE) {
|
|
// check XFEATURE_ENABLED_MASK[2:1] = '11b'
|
|
uint64_t bv = getXfeature();
|
|
if ((bv & 6) == 6) {
|
|
if (ECX & (1U << 28)) type_ |= tAVX;
|
|
if (ECX & (1U << 12)) type_ |= tFMA;
|
|
if (((bv >> 5) & 7) == 7) {
|
|
getCpuidEx(7, 0, data);
|
|
if (EBX & (1U << 16)) type_ |= tAVX512F;
|
|
if (type_ & tAVX512F) {
|
|
if (EBX & (1U << 17)) type_ |= tAVX512DQ;
|
|
if (EBX & (1U << 21)) type_ |= tAVX512_IFMA;
|
|
if (EBX & (1U << 26)) type_ |= tAVX512PF;
|
|
if (EBX & (1U << 27)) type_ |= tAVX512ER;
|
|
if (EBX & (1U << 28)) type_ |= tAVX512CD;
|
|
if (EBX & (1U << 30)) type_ |= tAVX512BW;
|
|
if (EBX & (1U << 31)) type_ |= tAVX512VL;
|
|
if (ECX & (1U << 1)) type_ |= tAVX512_VBMI;
|
|
if (ECX & (1U << 6)) type_ |= tAVX512_VBMI2;
|
|
if (ECX & (1U << 8)) type_ |= tGFNI;
|
|
if (ECX & (1U << 9)) type_ |= tVAES;
|
|
if (ECX & (1U << 10)) type_ |= tVPCLMULQDQ;
|
|
if (ECX & (1U << 11)) type_ |= tAVX512_VNNI;
|
|
if (ECX & (1U << 12)) type_ |= tAVX512_BITALG;
|
|
if (ECX & (1U << 14)) type_ |= tAVX512_VPOPCNTDQ;
|
|
if (EDX & (1U << 2)) type_ |= tAVX512_4VNNIW;
|
|
if (EDX & (1U << 3)) type_ |= tAVX512_4FMAPS;
|
|
if (EDX & (1U << 8)) type_ |= tAVX512_VP2INTERSECT;
|
|
}
|
|
// EAX=07H, ECX=1
|
|
getCpuidEx(7, 1, data);
|
|
if (type_ & tAVX512F) {
|
|
if (EAX & (1U << 5)) type_ |= tAVX512_BF16;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
if (maxNum >= 7) {
|
|
getCpuidEx(7, 0, data);
|
|
if (type_ & tAVX && (EBX & (1U << 5))) type_ |= tAVX2;
|
|
if (EBX & (1U << 3)) type_ |= tBMI1;
|
|
if (EBX & (1U << 8)) type_ |= tBMI2;
|
|
if (EBX & (1U << 9)) type_ |= tENHANCED_REP;
|
|
if (EBX & (1U << 18)) type_ |= tRDSEED;
|
|
if (EBX & (1U << 19)) type_ |= tADX;
|
|
if (EBX & (1U << 20)) type_ |= tSMAP;
|
|
if (EBX & (1U << 4)) type_ |= tHLE;
|
|
if (EBX & (1U << 11)) type_ |= tRTM;
|
|
if (EBX & (1U << 14)) type_ |= tMPX;
|
|
if (EBX & (1U << 29)) type_ |= tSHA;
|
|
if (ECX & (1U << 0)) type_ |= tPREFETCHWT1;
|
|
if (EDX & (1U << 24)) type_ |= tAMX_TILE;
|
|
if (EDX & (1U << 25)) type_ |= tAMX_INT8;
|
|
if (EDX & (1U << 22)) type_ |= tAMX_BF16;
|
|
}
|
|
setFamily();
|
|
setNumCores();
|
|
setCacheHierarchy();
|
|
}
|
|
void putFamily() const
|
|
{
|
|
#ifndef XBYAK_ONLY_CLASS_CPU
|
|
printf("family=%d, model=%X, stepping=%d, extFamily=%d, extModel=%X\n",
|
|
family, model, stepping, extFamily, extModel);
|
|
printf("display:family=%X, model=%X\n", displayFamily, displayModel);
|
|
#endif
|
|
}
|
|
bool has(Type type) const
|
|
{
|
|
return (type & type_) != 0;
|
|
}
|
|
};
|
|
|
|
#ifndef XBYAK_ONLY_CLASS_CPU
|
|
class Clock {
|
|
public:
|
|
static inline uint64_t getRdtsc()
|
|
{
|
|
#ifdef XBYAK_INTEL_CPU_SPECIFIC
|
|
#ifdef _MSC_VER
|
|
return __rdtsc();
|
|
#else
|
|
unsigned int eax, edx;
|
|
__asm__ volatile("rdtsc" : "=a"(eax), "=d"(edx));
|
|
return ((uint64_t)edx << 32) | eax;
|
|
#endif
|
|
#else
|
|
// TODO: Need another impl of Clock or rdtsc-equivalent for non-x86 cpu
|
|
return 0;
|
|
#endif
|
|
}
|
|
Clock()
|
|
: clock_(0)
|
|
, count_(0)
|
|
{
|
|
}
|
|
void begin()
|
|
{
|
|
clock_ -= getRdtsc();
|
|
}
|
|
void end()
|
|
{
|
|
clock_ += getRdtsc();
|
|
count_++;
|
|
}
|
|
int getCount() const { return count_; }
|
|
uint64_t getClock() const { return clock_; }
|
|
void clear() { count_ = 0; clock_ = 0; }
|
|
private:
|
|
uint64_t clock_;
|
|
int count_;
|
|
};
|
|
|
|
#ifdef XBYAK64
|
|
const int UseRCX = 1 << 6;
|
|
const int UseRDX = 1 << 7;
|
|
|
|
class Pack {
|
|
static const size_t maxTblNum = 15;
|
|
const Xbyak::Reg64 *tbl_[maxTblNum];
|
|
size_t n_;
|
|
public:
|
|
Pack() : tbl_(), n_(0) {}
|
|
Pack(const Xbyak::Reg64 *tbl, size_t n) { init(tbl, n); }
|
|
Pack(const Pack& rhs)
|
|
: n_(rhs.n_)
|
|
{
|
|
for (size_t i = 0; i < n_; i++) tbl_[i] = rhs.tbl_[i];
|
|
}
|
|
Pack& operator=(const Pack& rhs)
|
|
{
|
|
n_ = rhs.n_;
|
|
for (size_t i = 0; i < n_; i++) tbl_[i] = rhs.tbl_[i];
|
|
return *this;
|
|
}
|
|
Pack(const Xbyak::Reg64& t0)
|
|
{ n_ = 1; tbl_[0] = &t0; }
|
|
Pack(const Xbyak::Reg64& t1, const Xbyak::Reg64& t0)
|
|
{ n_ = 2; tbl_[0] = &t0; tbl_[1] = &t1; }
|
|
Pack(const Xbyak::Reg64& t2, const Xbyak::Reg64& t1, const Xbyak::Reg64& t0)
|
|
{ n_ = 3; tbl_[0] = &t0; tbl_[1] = &t1; tbl_[2] = &t2; }
|
|
Pack(const Xbyak::Reg64& t3, const Xbyak::Reg64& t2, const Xbyak::Reg64& t1, const Xbyak::Reg64& t0)
|
|
{ n_ = 4; tbl_[0] = &t0; tbl_[1] = &t1; tbl_[2] = &t2; tbl_[3] = &t3; }
|
|
Pack(const Xbyak::Reg64& t4, const Xbyak::Reg64& t3, const Xbyak::Reg64& t2, const Xbyak::Reg64& t1, const Xbyak::Reg64& t0)
|
|
{ n_ = 5; tbl_[0] = &t0; tbl_[1] = &t1; tbl_[2] = &t2; tbl_[3] = &t3; tbl_[4] = &t4; }
|
|
Pack(const Xbyak::Reg64& t5, const Xbyak::Reg64& t4, const Xbyak::Reg64& t3, const Xbyak::Reg64& t2, const Xbyak::Reg64& t1, const Xbyak::Reg64& t0)
|
|
{ n_ = 6; tbl_[0] = &t0; tbl_[1] = &t1; tbl_[2] = &t2; tbl_[3] = &t3; tbl_[4] = &t4; tbl_[5] = &t5; }
|
|
Pack(const Xbyak::Reg64& t6, const Xbyak::Reg64& t5, const Xbyak::Reg64& t4, const Xbyak::Reg64& t3, const Xbyak::Reg64& t2, const Xbyak::Reg64& t1, const Xbyak::Reg64& t0)
|
|
{ n_ = 7; tbl_[0] = &t0; tbl_[1] = &t1; tbl_[2] = &t2; tbl_[3] = &t3; tbl_[4] = &t4; tbl_[5] = &t5; tbl_[6] = &t6; }
|
|
Pack(const Xbyak::Reg64& t7, const Xbyak::Reg64& t6, const Xbyak::Reg64& t5, const Xbyak::Reg64& t4, const Xbyak::Reg64& t3, const Xbyak::Reg64& t2, const Xbyak::Reg64& t1, const Xbyak::Reg64& t0)
|
|
{ n_ = 8; tbl_[0] = &t0; tbl_[1] = &t1; tbl_[2] = &t2; tbl_[3] = &t3; tbl_[4] = &t4; tbl_[5] = &t5; tbl_[6] = &t6; tbl_[7] = &t7; }
|
|
Pack(const Xbyak::Reg64& t8, const Xbyak::Reg64& t7, const Xbyak::Reg64& t6, const Xbyak::Reg64& t5, const Xbyak::Reg64& t4, const Xbyak::Reg64& t3, const Xbyak::Reg64& t2, const Xbyak::Reg64& t1, const Xbyak::Reg64& t0)
|
|
{ n_ = 9; tbl_[0] = &t0; tbl_[1] = &t1; tbl_[2] = &t2; tbl_[3] = &t3; tbl_[4] = &t4; tbl_[5] = &t5; tbl_[6] = &t6; tbl_[7] = &t7; tbl_[8] = &t8; }
|
|
Pack(const Xbyak::Reg64& t9, const Xbyak::Reg64& t8, const Xbyak::Reg64& t7, const Xbyak::Reg64& t6, const Xbyak::Reg64& t5, const Xbyak::Reg64& t4, const Xbyak::Reg64& t3, const Xbyak::Reg64& t2, const Xbyak::Reg64& t1, const Xbyak::Reg64& t0)
|
|
{ n_ = 10; tbl_[0] = &t0; tbl_[1] = &t1; tbl_[2] = &t2; tbl_[3] = &t3; tbl_[4] = &t4; tbl_[5] = &t5; tbl_[6] = &t6; tbl_[7] = &t7; tbl_[8] = &t8; tbl_[9] = &t9; }
|
|
Pack& append(const Xbyak::Reg64& t)
|
|
{
|
|
if (n_ == maxTblNum) {
|
|
fprintf(stderr, "ERR Pack::can't append\n");
|
|
XBYAK_THROW_RET(ERR_BAD_PARAMETER, *this)
|
|
}
|
|
tbl_[n_++] = &t;
|
|
return *this;
|
|
}
|
|
void init(const Xbyak::Reg64 *tbl, size_t n)
|
|
{
|
|
if (n > maxTblNum) {
|
|
fprintf(stderr, "ERR Pack::init bad n=%d\n", (int)n);
|
|
XBYAK_THROW(ERR_BAD_PARAMETER)
|
|
}
|
|
n_ = n;
|
|
for (size_t i = 0; i < n; i++) {
|
|
tbl_[i] = &tbl[i];
|
|
}
|
|
}
|
|
const Xbyak::Reg64& operator[](size_t n) const
|
|
{
|
|
if (n >= n_) {
|
|
fprintf(stderr, "ERR Pack bad n=%d(%d)\n", (int)n, (int)n_);
|
|
XBYAK_THROW_RET(ERR_BAD_PARAMETER, rax)
|
|
}
|
|
return *tbl_[n];
|
|
}
|
|
size_t size() const { return n_; }
|
|
/*
|
|
get tbl[pos, pos + num)
|
|
*/
|
|
Pack sub(size_t pos, size_t num = size_t(-1)) const
|
|
{
|
|
if (num == size_t(-1)) num = n_ - pos;
|
|
if (pos + num > n_) {
|
|
fprintf(stderr, "ERR Pack::sub bad pos=%d, num=%d\n", (int)pos, (int)num);
|
|
XBYAK_THROW_RET(ERR_BAD_PARAMETER, Pack())
|
|
}
|
|
Pack pack;
|
|
pack.n_ = num;
|
|
for (size_t i = 0; i < num; i++) {
|
|
pack.tbl_[i] = tbl_[pos + i];
|
|
}
|
|
return pack;
|
|
}
|
|
void put() const
|
|
{
|
|
for (size_t i = 0; i < n_; i++) {
|
|
printf("%s ", tbl_[i]->toString());
|
|
}
|
|
printf("\n");
|
|
}
|
|
};
|
|
|
|
class StackFrame {
|
|
#ifdef XBYAK64_WIN
|
|
static const int noSaveNum = 6;
|
|
static const int rcxPos = 0;
|
|
static const int rdxPos = 1;
|
|
#else
|
|
static const int noSaveNum = 8;
|
|
static const int rcxPos = 3;
|
|
static const int rdxPos = 2;
|
|
#endif
|
|
static const int maxRegNum = 14; // maxRegNum = 16 - rsp - rax
|
|
Xbyak::CodeGenerator *code_;
|
|
int pNum_;
|
|
int tNum_;
|
|
bool useRcx_;
|
|
bool useRdx_;
|
|
int saveNum_;
|
|
int P_;
|
|
bool makeEpilog_;
|
|
Xbyak::Reg64 pTbl_[4];
|
|
Xbyak::Reg64 tTbl_[maxRegNum];
|
|
Pack p_;
|
|
Pack t_;
|
|
StackFrame(const StackFrame&);
|
|
void operator=(const StackFrame&);
|
|
public:
|
|
const Pack& p;
|
|
const Pack& t;
|
|
/*
|
|
make stack frame
|
|
@param sf [in] this
|
|
@param pNum [in] num of function parameter(0 <= pNum <= 4)
|
|
@param tNum [in] num of temporary register(0 <= tNum, with UseRCX, UseRDX) #{pNum + tNum [+rcx] + [rdx]} <= 14
|
|
@param stackSizeByte [in] local stack size
|
|
@param makeEpilog [in] automatically call close() if true
|
|
|
|
you can use
|
|
rax
|
|
gp0, ..., gp(pNum - 1)
|
|
gt0, ..., gt(tNum-1)
|
|
rcx if tNum & UseRCX
|
|
rdx if tNum & UseRDX
|
|
rsp[0..stackSizeByte - 1]
|
|
*/
|
|
StackFrame(Xbyak::CodeGenerator *code, int pNum, int tNum = 0, int stackSizeByte = 0, bool makeEpilog = true)
|
|
: code_(code)
|
|
, pNum_(pNum)
|
|
, tNum_(tNum & ~(UseRCX | UseRDX))
|
|
, useRcx_((tNum & UseRCX) != 0)
|
|
, useRdx_((tNum & UseRDX) != 0)
|
|
, saveNum_(0)
|
|
, P_(0)
|
|
, makeEpilog_(makeEpilog)
|
|
, p(p_)
|
|
, t(t_)
|
|
{
|
|
using namespace Xbyak;
|
|
if (pNum < 0 || pNum > 4) XBYAK_THROW(ERR_BAD_PNUM)
|
|
const int allRegNum = pNum + tNum_ + (useRcx_ ? 1 : 0) + (useRdx_ ? 1 : 0);
|
|
if (tNum_ < 0 || allRegNum > maxRegNum) XBYAK_THROW(ERR_BAD_TNUM)
|
|
const Reg64& _rsp = code->rsp;
|
|
saveNum_ = (std::max)(0, allRegNum - noSaveNum);
|
|
const int *tbl = getOrderTbl() + noSaveNum;
|
|
for (int i = 0; i < saveNum_; i++) {
|
|
code->push(Reg64(tbl[i]));
|
|
}
|
|
P_ = (stackSizeByte + 7) / 8;
|
|
if (P_ > 0 && (P_ & 1) == (saveNum_ & 1)) P_++; // (rsp % 16) == 8, then increment P_ for 16 byte alignment
|
|
P_ *= 8;
|
|
if (P_ > 0) code->sub(_rsp, P_);
|
|
int pos = 0;
|
|
for (int i = 0; i < pNum; i++) {
|
|
pTbl_[i] = Xbyak::Reg64(getRegIdx(pos));
|
|
}
|
|
for (int i = 0; i < tNum_; i++) {
|
|
tTbl_[i] = Xbyak::Reg64(getRegIdx(pos));
|
|
}
|
|
if (useRcx_ && rcxPos < pNum) code_->mov(code_->r10, code_->rcx);
|
|
if (useRdx_ && rdxPos < pNum) code_->mov(code_->r11, code_->rdx);
|
|
p_.init(pTbl_, pNum);
|
|
t_.init(tTbl_, tNum_);
|
|
}
|
|
/*
|
|
make epilog manually
|
|
@param callRet [in] call ret() if true
|
|
*/
|
|
void close(bool callRet = true)
|
|
{
|
|
using namespace Xbyak;
|
|
const Reg64& _rsp = code_->rsp;
|
|
const int *tbl = getOrderTbl() + noSaveNum;
|
|
if (P_ > 0) code_->add(_rsp, P_);
|
|
for (int i = 0; i < saveNum_; i++) {
|
|
code_->pop(Reg64(tbl[saveNum_ - 1 - i]));
|
|
}
|
|
|
|
if (callRet) code_->ret();
|
|
}
|
|
~StackFrame()
|
|
{
|
|
if (!makeEpilog_) return;
|
|
close();
|
|
}
|
|
private:
|
|
const int *getOrderTbl() const
|
|
{
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|
using namespace Xbyak;
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static const int tbl[] = {
|
|
#ifdef XBYAK64_WIN
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|
Operand::RCX, Operand::RDX, Operand::R8, Operand::R9, Operand::R10, Operand::R11, Operand::RDI, Operand::RSI,
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#else
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Operand::RDI, Operand::RSI, Operand::RDX, Operand::RCX, Operand::R8, Operand::R9, Operand::R10, Operand::R11,
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#endif
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Operand::RBX, Operand::RBP, Operand::R12, Operand::R13, Operand::R14, Operand::R15
|
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};
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return &tbl[0];
|
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}
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|
int getRegIdx(int& pos) const
|
|
{
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|
assert(pos < maxRegNum);
|
|
using namespace Xbyak;
|
|
const int *tbl = getOrderTbl();
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|
int r = tbl[pos++];
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|
if (useRcx_) {
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if (r == Operand::RCX) { return Operand::R10; }
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if (r == Operand::R10) { r = tbl[pos++]; }
|
|
}
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|
if (useRdx_) {
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|
if (r == Operand::RDX) { return Operand::R11; }
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|
if (r == Operand::R11) { return tbl[pos++]; }
|
|
}
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|
return r;
|
|
}
|
|
};
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|
#endif
|
|
|
|
class Profiler {
|
|
int mode_;
|
|
const char *suffix_;
|
|
const void *startAddr_;
|
|
#ifdef XBYAK_USE_PERF
|
|
FILE *fp_;
|
|
#endif
|
|
public:
|
|
enum {
|
|
None = 0,
|
|
Perf = 1,
|
|
VTune = 2
|
|
};
|
|
Profiler()
|
|
: mode_(None)
|
|
, suffix_("")
|
|
, startAddr_(0)
|
|
#ifdef XBYAK_USE_PERF
|
|
, fp_(0)
|
|
#endif
|
|
{
|
|
}
|
|
// append suffix to funcName
|
|
void setNameSuffix(const char *suffix)
|
|
{
|
|
suffix_ = suffix;
|
|
}
|
|
void setStartAddr(const void *startAddr)
|
|
{
|
|
startAddr_ = startAddr;
|
|
}
|
|
void init(int mode)
|
|
{
|
|
mode_ = None;
|
|
switch (mode) {
|
|
default:
|
|
case None:
|
|
return;
|
|
case Perf:
|
|
#ifdef XBYAK_USE_PERF
|
|
close();
|
|
{
|
|
const int pid = getpid();
|
|
char name[128];
|
|
snprintf(name, sizeof(name), "/tmp/perf-%d.map", pid);
|
|
fp_ = fopen(name, "a+");
|
|
if (fp_ == 0) {
|
|
fprintf(stderr, "can't open %s\n", name);
|
|
return;
|
|
}
|
|
}
|
|
mode_ = Perf;
|
|
#endif
|
|
return;
|
|
case VTune:
|
|
#ifdef XBYAK_USE_VTUNE
|
|
dlopen("dummy", RTLD_LAZY); // force to load dlopen to enable jit profiling
|
|
if (iJIT_IsProfilingActive() != iJIT_SAMPLING_ON) {
|
|
fprintf(stderr, "VTune profiling is not active\n");
|
|
return;
|
|
}
|
|
mode_ = VTune;
|
|
#endif
|
|
return;
|
|
}
|
|
}
|
|
~Profiler()
|
|
{
|
|
close();
|
|
}
|
|
void close()
|
|
{
|
|
#ifdef XBYAK_USE_PERF
|
|
if (fp_ == 0) return;
|
|
fclose(fp_);
|
|
fp_ = 0;
|
|
#endif
|
|
}
|
|
void set(const char *funcName, const void *startAddr, size_t funcSize) const
|
|
{
|
|
if (mode_ == None) return;
|
|
#if !defined(XBYAK_USE_PERF) && !defined(XBYAK_USE_VTUNE)
|
|
(void)funcName;
|
|
(void)startAddr;
|
|
(void)funcSize;
|
|
#endif
|
|
#ifdef XBYAK_USE_PERF
|
|
if (mode_ == Perf) {
|
|
if (fp_ == 0) return;
|
|
fprintf(fp_, "%llx %zx %s%s", (long long)startAddr, funcSize, funcName, suffix_);
|
|
/*
|
|
perf does not recognize the function name which is less than 3,
|
|
so append '_' at the end of the name if necessary
|
|
*/
|
|
size_t n = strlen(funcName) + strlen(suffix_);
|
|
for (size_t i = n; i < 3; i++) {
|
|
fprintf(fp_, "_");
|
|
}
|
|
fprintf(fp_, "\n");
|
|
fflush(fp_);
|
|
}
|
|
#endif
|
|
#ifdef XBYAK_USE_VTUNE
|
|
if (mode_ != VTune) return;
|
|
char className[] = "";
|
|
char fileName[] = "";
|
|
iJIT_Method_Load jmethod = {};
|
|
jmethod.method_id = iJIT_GetNewMethodID();
|
|
jmethod.class_file_name = className;
|
|
jmethod.source_file_name = fileName;
|
|
jmethod.method_load_address = const_cast<void*>(startAddr);
|
|
jmethod.method_size = funcSize;
|
|
jmethod.line_number_size = 0;
|
|
char buf[128];
|
|
snprintf(buf, sizeof(buf), "%s%s", funcName, suffix_);
|
|
jmethod.method_name = buf;
|
|
iJIT_NotifyEvent(iJVM_EVENT_TYPE_METHOD_LOAD_FINISHED, (void*)&jmethod);
|
|
#endif
|
|
}
|
|
/*
|
|
for continuous set
|
|
funcSize = endAddr - <previous set endAddr>
|
|
*/
|
|
void set(const char *funcName, const void *endAddr)
|
|
{
|
|
set(funcName, startAddr_, (size_t)endAddr - (size_t)startAddr_);
|
|
startAddr_ = endAddr;
|
|
}
|
|
};
|
|
#endif // XBYAK_ONLY_CLASS_CPU
|
|
|
|
} } // end of util
|
|
|
|
#endif
|