260 lines
12 KiB
C++
260 lines
12 KiB
C++
/* This file is part of the dynarmic project.
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* Copyright (c) 2016 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#pragma once
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#include "common/common_types.h"
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#include "frontend/ir/basic_block.h"
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#include "frontend/ir/location_descriptor.h"
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#include "frontend/ir/terminal.h"
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#include "frontend/ir/value.h"
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// ARM JIT Microinstruction Intermediate Representation
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//
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// This intermediate representation is an SSA IR. It is designed primarily for analysis,
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// though it can be lowered into a reduced form for interpretation. Each IR node (Value)
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// is a microinstruction of an idealised ARM CPU. The choice of microinstructions is made
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// not based on any existing microarchitecture but on ease of implementation.
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namespace Dynarmic::IR {
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enum class Opcode;
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template <typename T>
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struct ResultAndCarry {
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T result;
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U1 carry;
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};
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template <typename T>
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struct ResultAndOverflow {
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T result;
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U1 overflow;
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};
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template <typename T>
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struct ResultAndCarryAndOverflow {
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T result;
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U1 carry;
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U1 overflow;
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};
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template <typename T>
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struct ResultAndGE {
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T result;
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U32 ge;
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};
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/**
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* Convenience class to construct a basic block of the intermediate representation.
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* `block` is the resulting block.
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* The user of this class updates `current_location` as appropriate.
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*/
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class IREmitter {
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public:
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explicit IREmitter(Block& block) : block(block), insertion_point(block.end()) {}
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Block& block;
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U1 Imm1(bool value);
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U8 Imm8(u8 value);
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U16 Imm16(u16 value);
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U32 Imm32(u32 value);
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U64 Imm64(u64 value);
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void PushRSB(const LocationDescriptor& return_location);
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U64 Pack2x32To1x64(const U32& lo, const U32& hi);
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U32 LeastSignificantWord(const U64& value);
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ResultAndCarry<U32> MostSignificantWord(const U64& value);
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U16 LeastSignificantHalf(U32U64 value);
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U8 LeastSignificantByte(U32U64 value);
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U1 MostSignificantBit(const U32& value);
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U1 IsZero(const U32& value);
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U1 IsZero(const U64& value);
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U1 IsZero(const U32U64& value);
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U1 TestBit(const U32U64& value, const U8& bit);
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U32 ConditionalSelect(Cond cond, const U32& a, const U32& b);
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U64 ConditionalSelect(Cond cond, const U64& a, const U64& b);
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NZCV ConditionalSelect(Cond cond, const NZCV& a, const NZCV& b);
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U32U64 ConditionalSelect(Cond cond, const U32U64& a, const U32U64& b);
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NZCV NZCVFromPackedFlags(const U32& a);
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// This pseudo-instruction may only be added to instructions that support it.
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NZCV NZCVFrom(const Value& value);
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ResultAndCarry<U32> LogicalShiftLeft(const U32& value_in, const U8& shift_amount, const U1& carry_in);
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ResultAndCarry<U32> LogicalShiftRight(const U32& value_in, const U8& shift_amount, const U1& carry_in);
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ResultAndCarry<U32> ArithmeticShiftRight(const U32& value_in, const U8& shift_amount, const U1& carry_in);
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ResultAndCarry<U32> RotateRight(const U32& value_in, const U8& shift_amount, const U1& carry_in);
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U32 LogicalShiftLeft(const U32& value_in, const U8& shift_amount);
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U64 LogicalShiftLeft(const U64& value_in, const U8& shift_amount);
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U32U64 LogicalShiftLeft(const U32U64& value_in, const U8& shift_amount);
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U32 LogicalShiftRight(const U32& value_in, const U8& shift_amount);
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U64 LogicalShiftRight(const U64& value_in, const U8& shift_amount);
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U32U64 LogicalShiftRight(const U32U64& value_in, const U8& shift_amount);
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U32U64 ArithmeticShiftRight(const U32U64& value_in, const U8& shift_amount);
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U32U64 RotateRight(const U32U64& value_in, const U8& shift_amount);
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ResultAndCarry<U32> RotateRightExtended(const U32& value_in, const U1& carry_in);
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ResultAndCarryAndOverflow<U32> AddWithCarry(const U32& a, const U32& b, const U1& carry_in);
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ResultAndCarryAndOverflow<U32> SubWithCarry(const U32& a, const U32& b, const U1& carry_in);
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U32U64 AddWithCarry(const U32U64& a, const U32U64& b, const U1& carry_in);
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U32U64 SubWithCarry(const U32U64& a, const U32U64& b, const U1& carry_in);
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U32 Add(const U32& a, const U32& b);
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U64 Add(const U64& a, const U64& b);
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U32U64 Add(const U32U64& a, const U32U64& b);
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U32 Sub(const U32& a, const U32& b);
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U64 Sub(const U64& a, const U64& b);
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U32U64 Sub(const U32U64& a, const U32U64& b);
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U32 Mul(const U32& a, const U32& b);
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U64 Mul(const U64& a, const U64& b);
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U32U64 Mul(const U32U64& a, const U32U64& b);
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U64 UnsignedMultiplyHigh(const U64& a, const U64& b);
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U64 SignedMultiplyHigh(const U64& a, const U64& b);
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U32 UnsignedDiv(const U32& a, const U32& b);
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U64 UnsignedDiv(const U64& a, const U64& b);
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U32U64 UnsignedDiv(const U32U64& a, const U32U64& b);
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U32 SignedDiv(const U32& a, const U32& b);
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U64 SignedDiv(const U64& a, const U64& b);
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U32U64 SignedDiv(const U32U64& a, const U32U64& b);
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U32 And(const U32& a, const U32& b);
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U32U64 And(const U32U64& a, const U32U64& b);
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U32 Eor(const U32& a, const U32& b);
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U32U64 Eor(const U32U64& a, const U32U64& b);
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U32 Or(const U32& a, const U32& b);
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U32U64 Or(const U32U64& a, const U32U64& b);
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U32 Not(const U32& a);
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U32U64 Not(const U32U64& a);
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U32 SignExtendToWord(const UAny& a);
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U64 SignExtendToLong(const UAny& a);
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U32 SignExtendByteToWord(const U8& a);
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U32 SignExtendHalfToWord(const U16& a);
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U64 SignExtendWordToLong(const U32& a);
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U32 ZeroExtendToWord(const UAny& a);
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U64 ZeroExtendToLong(const UAny& a);
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U128 ZeroExtendToQuad(const UAny& a);
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U32 ZeroExtendByteToWord(const U8& a);
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U32 ZeroExtendHalfToWord(const U16& a);
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U64 ZeroExtendWordToLong(const U32& a);
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U32 IndeterminateExtendToWord(const UAny& a);
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U64 IndeterminateExtendToLong(const UAny& a);
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U32 ByteReverseWord(const U32& a);
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U16 ByteReverseHalf(const U16& a);
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U64 ByteReverseDual(const U64& a);
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U32 CountLeadingZeros(const U32& a);
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U64 CountLeadingZeros(const U64& a);
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U32U64 CountLeadingZeros(const U32U64& a);
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U32 ExtractRegister(const U32& a, const U32& b, const U8& lsb);
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U64 ExtractRegister(const U64& a, const U64& b, const U8& lsb);
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U32U64 ExtractRegister(const U32U64& a, const U32U64& b, const U8& lsb);
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ResultAndOverflow<U32> SignedSaturatedAdd(const U32& a, const U32& b);
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ResultAndOverflow<U32> SignedSaturatedSub(const U32& a, const U32& b);
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ResultAndOverflow<U32> UnsignedSaturation(const U32& a, size_t bit_size_to_saturate_to);
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ResultAndOverflow<U32> SignedSaturation(const U32& a, size_t bit_size_to_saturate_to);
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ResultAndGE<U32> PackedAddU8(const U32& a, const U32& b);
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ResultAndGE<U32> PackedAddS8(const U32& a, const U32& b);
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ResultAndGE<U32> PackedAddU16(const U32& a, const U32& b);
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ResultAndGE<U32> PackedAddS16(const U32& a, const U32& b);
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ResultAndGE<U32> PackedSubU8(const U32& a, const U32& b);
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ResultAndGE<U32> PackedSubS8(const U32& a, const U32& b);
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ResultAndGE<U32> PackedSubU16(const U32& a, const U32& b);
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ResultAndGE<U32> PackedSubS16(const U32& a, const U32& b);
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ResultAndGE<U32> PackedAddSubU16(const U32& a, const U32& b);
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ResultAndGE<U32> PackedAddSubS16(const U32& a, const U32& b);
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ResultAndGE<U32> PackedSubAddU16(const U32& a, const U32& b);
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ResultAndGE<U32> PackedSubAddS16(const U32& a, const U32& b);
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U32 PackedHalvingAddU8(const U32& a, const U32& b);
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U32 PackedHalvingAddS8(const U32& a, const U32& b);
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U32 PackedHalvingSubU8(const U32& a, const U32& b);
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U32 PackedHalvingSubS8(const U32& a, const U32& b);
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U32 PackedHalvingAddU16(const U32& a, const U32& b);
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U32 PackedHalvingAddS16(const U32& a, const U32& b);
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U32 PackedHalvingSubU16(const U32& a, const U32& b);
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U32 PackedHalvingSubS16(const U32& a, const U32& b);
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U32 PackedHalvingAddSubU16(const U32& a, const U32& b);
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U32 PackedHalvingAddSubS16(const U32& a, const U32& b);
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U32 PackedHalvingSubAddU16(const U32& a, const U32& b);
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U32 PackedHalvingSubAddS16(const U32& a, const U32& b);
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U32 PackedSaturatedAddU8(const U32& a, const U32& b);
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U32 PackedSaturatedAddS8(const U32& a, const U32& b);
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U32 PackedSaturatedSubU8(const U32& a, const U32& b);
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U32 PackedSaturatedSubS8(const U32& a, const U32& b);
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U32 PackedSaturatedAddU16(const U32& a, const U32& b);
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U32 PackedSaturatedAddS16(const U32& a, const U32& b);
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U32 PackedSaturatedSubU16(const U32& a, const U32& b);
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U32 PackedSaturatedSubS16(const U32& a, const U32& b);
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U32 PackedAbsDiffSumS8(const U32& a, const U32& b);
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U32 PackedSelect(const U32& ge, const U32& a, const U32& b);
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U32 CRC32Castagnoli8(const U32& a, const U32& b);
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U32 CRC32Castagnoli16(const U32& a, const U32& b);
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U32 CRC32Castagnoli32(const U32& a, const U32& b);
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U32 CRC32Castagnoli64(const U32& a, const U64& b);
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U32 CRC32ISO8(const U32& a, const U32& b);
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U32 CRC32ISO16(const U32& a, const U32& b);
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U32 CRC32ISO32(const U32& a, const U32& b);
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U32 CRC32ISO64(const U32& a, const U64& b);
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U128 AESDecryptSingleRound(const U128& a);
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U128 AESEncryptSingleRound(const U128& a);
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U128 AESInverseMixColumns(const U128& a);
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U128 AESMixColumns(const U128& a);
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UAny VectorGetElement(size_t esize, const U128& a, size_t index);
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U128 VectorSetElement(size_t esize, const U128& a, size_t index, const UAny& elem);
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U128 VectorAdd(size_t esize, const U128& a, const U128& b);
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U128 VectorAnd(const U128& a, const U128& b);
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U128 VectorBroadcast(size_t esize, const UAny& a);
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U128 VectorBroadcastLower(size_t esize, const UAny& a);
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U128 VectorEor(const U128& a, const U128& b);
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U128 VectorEqual(size_t esize, const U128& a, const U128& b);
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U128 VectorInterleaveLower(size_t esize, const U128& a, const U128& b);
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U128 VectorLogicalShiftLeft(size_t esize, const U128& a, u8 shift_amount);
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U128 VectorNot(const U128& a);
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U128 VectorOr(const U128& a, const U128& b);
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U128 VectorPairedAdd(size_t esize, const U128& a, const U128& b);
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U128 VectorPairedAddLower(size_t esize, const U128& a, const U128& b);
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U128 VectorZeroUpper(const U128& a);
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U32U64 FPAbs(const U32U64& a);
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U32U64 FPAdd(const U32U64& a, const U32U64& b, bool fpscr_controlled);
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NZCV FPCompare(const U32U64& a, const U32U64& b, bool exc_on_qnan, bool fpscr_controlled);
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U32U64 FPDiv(const U32U64& a, const U32U64& b, bool fpscr_controlled);
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U32U64 FPMul(const U32U64& a, const U32U64& b, bool fpscr_controlled);
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U32U64 FPNeg(const U32U64& a);
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U32U64 FPSqrt(const U32U64& a);
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U32U64 FPSub(const U32U64& a, const U32U64& b, bool fpscr_controlled);
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U32 FPDoubleToSingle(const U64& a, bool fpscr_controlled);
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U64 FPSingleToDouble(const U32& a, bool fpscr_controlled);
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U32 FPSingleToS32(const U32& a, bool round_towards_zero, bool fpscr_controlled);
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U32 FPSingleToU32(const U32& a, bool round_towards_zero, bool fpscr_controlled);
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U32 FPDoubleToS32(const U64& a, bool round_towards_zero, bool fpscr_controlled);
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U32 FPDoubleToU32(const U64& a, bool round_towards_zero, bool fpscr_controlled);
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U32 FPS32ToSingle(const U32& a, bool round_to_nearest, bool fpscr_controlled);
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U32 FPU32ToSingle(const U32& a, bool round_to_nearest, bool fpscr_controlled);
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U64 FPS32ToDouble(const U32& a, bool round_to_nearest, bool fpscr_controlled);
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U64 FPU32ToDouble(const U32& a, bool round_to_nearest, bool fpscr_controlled);
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void Breakpoint();
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void SetTerm(const Terminal& terminal);
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void SetInsertionPoint(IR::Inst* new_insertion_point);
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void SetInsertionPoint(IR::Block::iterator new_insertion_point);
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protected:
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IR::Block::iterator insertion_point;
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template<typename T = Value, typename ...Args>
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T Inst(Opcode op, Args ...args) {
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auto iter = block.PrependNewInst(insertion_point, op, {Value(args)...});
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return T(Value(&*iter));
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}
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};
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} // namespace Dynarmic::IR
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