The executor is coming along.
Graphics and sound related instructions are gonna remain unimplemented for a while as I focus on getting the generic CPU up, then a ROM buffer and eventually working out how to graphics.
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2 changed files with 38 additions and 2 deletions
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@ -1,6 +1,6 @@
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[package]
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[package]
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name = "celc8"
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name = "celc8"
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version = "0.1.0"
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version = "0.1.1"
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edition = "2021"
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edition = "2021"
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# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
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# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
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38
src/main.rs
38
src/main.rs
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@ -28,6 +28,9 @@ impl Cpu {
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fn indwrite(&mut self, value: u16) {
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fn indwrite(&mut self, value: u16) {
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self.i = value;
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self.i = value;
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}
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}
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fn incrementpc(&mut self) {
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self.pc = self.pc + 2
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}
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}
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}
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struct Instruction {
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struct Instruction {
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@ -198,11 +201,44 @@ fn decodetest(opcode: u16, expected: &str) {
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}
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}
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}
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}
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fn execute(opcode: u16, instruction: Instruction, mut cpu: Cpu) -> Cpu {
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let mut args: Vec<u16> = vec![];
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let mut i = 0;
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if instruction.masks.len() != 0 {
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for mask in instruction.masks {
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let shift = instruction.shifts[i];
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args.push((opcode & mask) >> shift);
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i = i + 1;
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}
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}
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if instruction.name == "LD_VX_BYTE" {
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cpu.regwrite(args[0] as usize, args[1] as u8);
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cpu.incrementpc();
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}
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else { println!("Unimplemented instruction {}. Skipping.", instruction.name) }
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return cpu;
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}
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fn main() {
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fn main() {
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let mut cpu = Cpu { memory: vec![0; 4096], pc: 0x200, registers: vec![0;16], i: 0, stack: vec![0; 16], sp: -1, dt: 0, st: 0 };
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let mut cpu = Cpu { memory: vec![0; 4096], pc: 0x200, registers: vec![0; 16], i: 0, stack: vec![0; 16], sp: -1, dt: 0, st: 0 };
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println!("CPU initialised!");
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println!("CPU initialised!");
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torture();
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torture();
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println!("If you see messages above that are about opcodes, there's a bug!");
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println!("If you see messages above that are about opcodes, there's a bug!");
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println!("Executing LD_VX_BYTE with opcode 0x6010, register 0 should be 16.");
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let mut opcode = 0x6010;
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let mut instruction = disassemble(opcode);
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cpu = execute(opcode, instruction, cpu);
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println!("Register 0 is {}!", cpu.registers[0]);
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println!("Executing CLS which is not implemented. There should be an unimplemented error.");
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opcode = 0x00e0;
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instruction = disassemble(opcode);
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cpu = execute(opcode, instruction, cpu);
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}
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}
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fn torture() {
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fn torture() {
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