cool stuff for memory
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668d938097
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2 changed files with 10 additions and 9 deletions
2
Cargo.lock
generated
2
Cargo.lock
generated
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@ -4,4 +4,4 @@ version = 3
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[[package]]
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name = "celc8"
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version = "0.1.0"
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version = "0.1.1"
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17
src/main.rs
17
src/main.rs
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@ -22,15 +22,18 @@ impl Cpu {
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fn regwrite(&mut self, index: usize, value: u8) {
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self.registers[index] = value;
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}
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fn indread(&self) -> &u16 {
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fn iread(&self) -> &u16 {
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&self.i
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}
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fn indwrite(&mut self, value: u16) {
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fn iwrite(&mut self, value: u16) {
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self.i = value;
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}
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fn incrementpc(&mut self) {
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self.pc = self.pc + 2
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}
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fn fetch(&mut self) -> u16 {
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return ((self.memory[self.pc as usize] as u16) << 8 | self.memory[self.pc as usize + 1 as usize] as u16)
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}
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}
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struct Instruction {
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@ -229,16 +232,14 @@ fn main() {
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torture();
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println!("If you see messages above that are about opcodes, there's a bug!");
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println!("Executing LD_VX_BYTE with opcode 0x6010, register 0 should be 16.");
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let mut opcode = 0x6010;
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println!("Executing LD_VX_BYTE with opcode 0x6010 through memory.");
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cpu.memory[0x200] = 0x60;
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cpu.memory[0x201] = 0x10;
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let mut opcode = cpu.fetch();
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let mut instruction = disassemble(opcode);
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cpu = execute(opcode, instruction, cpu);
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println!("Register 0 is {}!", cpu.registers[0]);
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println!("Executing CLS which is not implemented. There should be an unimplemented error.");
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opcode = 0x00e0;
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instruction = disassemble(opcode);
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cpu = execute(opcode, instruction, cpu);
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}
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fn torture() {
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