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simd_two_register_misc: Utilize FPVectorAbs in FABS implementations

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Since we already have opcodes introduced to implement FACGE and FACGT,
we can reutilize it for the FABS implementations.
This commit is contained in:
Lioncash 2018-07-07 14:54:44 -04:00 committed by MerryMage
parent 81e572c78c
commit 0f4bf26e05
1 changed files with 3 additions and 5 deletions
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8
src/frontend/A64/translate/impl/simd_two_register_misc.cpp
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@ -148,10 +148,10 @@ bool TranslatorVisitor::XTN(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
bool TranslatorVisitor::FABS_1(bool Q, Vec Vn, Vec Vd) { bool TranslatorVisitor::FABS_1(bool Q, Vec Vn, Vec Vd) {
const size_t datasize = Q ? 128 : 64; const size_t datasize = Q ? 128 : 64;
const size_t esize = 16;
const IR::U128 operand = V(datasize, Vn); const IR::U128 operand = V(datasize, Vn);
const IR::U128 mask = ir.VectorBroadcast(64, I(64, 0x7FFF7FFF7FFF7FFF)); const IR::U128 result = ir.FPVectorAbs(esize, operand);
const IR::U128 result = ir.VectorAnd(operand, mask);
V(datasize, Vd, result); V(datasize, Vd, result);
return true; return true;
@ -164,11 +164,9 @@ bool TranslatorVisitor::FABS_2(bool Q, bool sz, Vec Vn, Vec Vd) {
const size_t datasize = Q ? 128 : 64; const size_t datasize = Q ? 128 : 64;
const size_t esize = sz ? 64 : 32; const size_t esize = sz ? 64 : 32;
const size_t mask_value = sz ? 0x7FFFFFFFFFFFFFFF : 0x7FFFFFFF;
const IR::U128 operand = V(datasize, Vn); const IR::U128 operand = V(datasize, Vn);
const IR::U128 mask = ir.VectorBroadcast(esize, I(esize, mask_value)); const IR::U128 result = ir.FPVectorAbs(esize, operand);
const IR::U128 result = ir.VectorAnd(operand, mask);
V(datasize, Vd, result); V(datasize, Vd, result);
return true; return true;