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A32: Implement ASIMD VRSHRN

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Lioncash 2020-06-21 17:41:15 -04:00 committed by merry
parent 86b0e5c1c5
commit 39488e4aad
3 changed files with 7 additions and 1 deletions
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2
src/frontend/A32/decoder/asimd.inc
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@ -88,7 +88,7 @@ INST(asimd_VSHL, "VSHL", "111100101Diiiiiidddd010
INST(asimd_VSLI, "VSLI", "111100111Diiiiiidddd0101LQM1mmmm") // ASIMD
INST(asimd_VQSHL, "VQSHL" , "1111001U1Diiiiiidddd011oLQM1mmmm") // ASIMD
INST(asimd_VSHRN, "VSHRN", "111100101Diiiiiidddd100000M1mmmm") // ASIMD
//INST(asimd_VRSHRN, "VRSHRN", "111100101-vvv-------100001-1----") // ASIMD
INST(asimd_VRSHRN, "VRSHRN", "111100101Diiiiiidddd100001M1mmmm") // ASIMD
INST(asimd_VQSHRUN, "VQSHRUN", "111100111Diiiiiidddd100000M1mmmm") // ASIMD
INST(asimd_VQRSHRUN, "VQRSHRUN", "111100111Diiiiiidddd100001M1mmmm") // ASIMD
INST(asimd_VQSHRN, "VQSHRN", "1111001U1Diiiiiidddd100100M1mmmm") // ASIMD

5
src/frontend/A32/translate/impl/asimd_two_regs_shift.cpp
View file

@ -281,6 +281,11 @@ bool ArmTranslatorVisitor::asimd_VSHRN(bool D, size_t imm6, size_t Vd, bool M, s
Rounding::None, Narrowing::Truncation, Signedness::Unsigned);
}
bool ArmTranslatorVisitor::asimd_VRSHRN(bool D, size_t imm6, size_t Vd, bool M, size_t Vm) {
return ShiftRightNarrowing(*this, D, imm6, Vd, M, Vm,
Rounding::Round, Narrowing::Truncation, Signedness::Unsigned);
}
bool ArmTranslatorVisitor::asimd_VQRSHRUN(bool D, size_t imm6, size_t Vd, bool M, size_t Vm) {
return ShiftRightNarrowing(*this, D, imm6, Vd, M, Vm,
Rounding::Round, Narrowing::SaturateToUnsigned, Signedness::Signed);

1
src/frontend/A32/translate/impl/translate_arm.h
View file

@ -515,6 +515,7 @@ struct ArmTranslatorVisitor final {
bool asimd_VSLI(bool D, size_t imm6, size_t Vd, bool L, bool Q, bool M, size_t Vm);
bool asimd_VQSHL(bool U, bool D, size_t imm6, size_t Vd, bool op, bool L, bool Q, bool M, size_t Vm);
bool asimd_VSHRN(bool D, size_t imm6, size_t Vd, bool M, size_t Vm);
bool asimd_VRSHRN(bool D, size_t imm6, size_t Vd, bool M, size_t Vm);
bool asimd_VQSHRUN(bool D, size_t imm6, size_t Vd, bool M, size_t Vm);
bool asimd_VQRSHRUN(bool D, size_t imm6, size_t Vd, bool M, size_t Vm);
bool asimd_VQSHRN(bool U, bool D, size_t imm6, size_t Vd, bool M, size_t Vm);