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thumb32: Implement SUB (reg)

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This commit is contained in:
MerryMage 2021-03-06 19:45:25 +00:00
parent 17bdb54d30
commit 3f97cb1f9b
3 changed files with 21 additions and 1 deletions
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2
src/frontend/A32/decoder/thumb32.inc
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@ -44,7 +44,7 @@ INST(thumb32_ADD_reg, "ADD (reg)", "11101011000Snnnn0vvvdd
INST(thumb32_ADC_reg, "ADC (reg)", "11101011010Snnnn0vvvddddvvttmmmm")
INST(thumb32_SBC_reg, "SBC (reg)", "11101011011Snnnn0vvvddddvvttmmmm")
INST(thumb32_CMP_reg, "CMP (reg)", "111010111011nnnn0vvv1111vvttmmmm")
//INST(thumb32_SUB_reg, "SUB (reg)", "11101011101---------------------")
INST(thumb32_SUB_reg, "SUB (reg)", "11101011101Snnnn0vvvddddvvttmmmm")
//INST(thumb32_RSB_reg, "RSB (reg)", "11101011110---------------------")
// Data Processing (Modified Immediate)

19
src/frontend/A32/translate/impl/thumb32_data_processing_shifted_register.cpp
View file

@ -253,4 +253,23 @@ bool ThumbTranslatorVisitor::thumb32_CMP_reg(Reg n, Imm<3> imm3, Imm<2> imm2, Sh
return true;
}
bool ThumbTranslatorVisitor::thumb32_SUB_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m) {
ASSERT_MSG(!(d == Reg::PC && S), "Decode error");
if ((d == Reg::PC && !S) || n == Reg::PC || m == Reg::PC) {
return UnpredictableInstruction();
}
const auto shifted = EmitImmShift(ir.GetRegister(m), type, imm3, imm2, ir.GetCFlag());
const auto result = ir.SubWithCarry(ir.GetRegister(n), shifted.result, ir.Imm1(1));
ir.SetRegister(d, result.result);
if (S) {
ir.SetNFlag(ir.MostSignificantBit(result.result));
ir.SetZFlag(ir.IsZero(result.result));
ir.SetCFlag(result.carry);
ir.SetVFlag(result.overflow);
}
return true;
}
} // namespace Dynarmic::A32

1
src/frontend/A32/translate/impl/translate_thumb.h
View file

@ -187,6 +187,7 @@ struct ThumbTranslatorVisitor final {
bool thumb32_ADC_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m);
bool thumb32_SBC_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m);
bool thumb32_CMP_reg(Reg n, Imm<3> imm3, Imm<2> imm2, ShiftType type, Reg m);
bool thumb32_SUB_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m);
// thumb32 data processing (modified immediate) instructions
bool thumb32_TST_imm(Imm<1> i, Reg n, Imm<3> imm3, Imm<8> imm8);