A64: The A64SetTPIDR IR instruction writes to a system register and should not be eliminated by the dead code elimination pass.
Previously this instruction was alway eliminated, resulting in incorrect values for TPIDR_EL0.
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2 changed files with 13 additions and 0 deletions
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@ -152,6 +152,15 @@ bool Inst::WritesToCPSR() const {
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}
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}
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}
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}
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bool Inst::WritesToSystemRegister() const {
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switch (op) {
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case Opcode::A64SetTPIDR:
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return true;
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default:
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return false;
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}
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}
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bool Inst::ReadsFromCoreRegister() const {
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bool Inst::ReadsFromCoreRegister() const {
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switch (op) {
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switch (op) {
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case Opcode::A32GetRegister:
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case Opcode::A32GetRegister:
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@ -287,6 +296,7 @@ bool Inst::MayHaveSideEffects() const {
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op == Opcode::A64DataMemoryBarrier ||
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op == Opcode::A64DataMemoryBarrier ||
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CausesCPUException() ||
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CausesCPUException() ||
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WritesToCoreRegister() ||
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WritesToCoreRegister() ||
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WritesToSystemRegister() ||
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WritesToCPSR() ||
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WritesToCPSR() ||
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WritesToFPSCR() ||
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WritesToFPSCR() ||
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AltersExclusiveState() ||
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AltersExclusiveState() ||
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@ -55,6 +55,9 @@ public:
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/// Determines whether or not this instruction writes to the CPSR.
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/// Determines whether or not this instruction writes to the CPSR.
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bool WritesToCPSR() const;
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bool WritesToCPSR() const;
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/// Determines whether or not this instruction writes to a system register.
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bool WritesToSystemRegister() const;
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/// Determines whether or not this instruction reads from a core register.
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/// Determines whether or not this instruction reads from a core register.
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bool ReadsFromCoreRegister() const;
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bool ReadsFromCoreRegister() const;
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/// Determines whether or not this instruction writes to a core register.
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/// Determines whether or not this instruction writes to a core register.
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