mirrors/dynarmic
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

A64: Implement ADDHN{2} and SUBHN{2}

Browse source
This commit is contained in:
Lioncash 2018-04-20 15:33:14 -04:00 committed by MerryMage
parent 3acd9c9200
commit 48c7f8630c
2 changed files with 45 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
src/frontend/A64/decoder/a64.inc
View file

@ -679,9 +679,9 @@ INST(SADDL, "SADDL, SADDL2", "0Q001
INST(SADDW, "SADDW, SADDW2", "0Q001110zz1mmmmm000100nnnnnddddd")
INST(SSUBL, "SSUBL, SSUBL2", "0Q001110zz1mmmmm001000nnnnnddddd")
INST(SSUBW, "SSUBW, SSUBW2", "0Q001110zz1mmmmm001100nnnnnddddd")
//INST(ADDHN, "ADDHN, ADDHN2", "0Q001110zz1mmmmm010000nnnnnddddd")
INST(ADDHN, "ADDHN, ADDHN2", "0Q001110zz1mmmmm010000nnnnnddddd")
//INST(SABAL, "SABAL, SABAL2", "0Q001110zz1mmmmm010100nnnnnddddd")
//INST(SUBHN, "SUBHN, SUBHN2", "0Q001110zz1mmmmm011000nnnnnddddd")
INST(SUBHN, "SUBHN, SUBHN2", "0Q001110zz1mmmmm011000nnnnnddddd")
//INST(SABDL, "SABDL, SABDL2", "0Q001110zz1mmmmm011100nnnnnddddd")
//INST(SMLAL_vec, "SMLAL, SMLAL2 (vector)", "0Q001110zz1mmmmm100000nnnnnddddd")
//INST(SMLSL_vec, "SMLSL, SMLSL2 (vector)", "0Q001110zz1mmmmm101000nnnnnddddd")

43
src/frontend/A64/translate/impl/simd_three_same.cpp
View file

@ -7,6 +7,31 @@
#include "frontend/A64/translate/impl/impl.h"
namespace Dynarmic::A64 {
namespace {
enum class HighNarrowingOp {
Add,
Subtract,
};
static void HighNarrowingOperation(TranslatorVisitor& v, bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd,
HighNarrowingOp op) {
const size_t part = Q;
const size_t esize = 8 << size.ZeroExtend();
const IR::U128 operand1 = v.ir.GetQ(Vn);
const IR::U128 operand2 = v.ir.GetQ(Vm);
const IR::U128 wide = [&] {
if (op == HighNarrowingOp::Add) {
return v.ir.VectorAdd(2 * esize, operand1, operand2);
}
return v.ir.VectorSub(2 * esize, operand1, operand2);
}();
const IR::U128 result = v.ir.VectorNarrow(2 * esize,
v.ir.VectorLogicalShiftRight(2 * esize, wide, static_cast<u8>(esize)));
v.Vpart(64, Vd, part, result);
}
} // Anonymous namespace
bool TranslatorVisitor::CMGT_reg_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
if (size == 0b11 && !Q) return ReservedValue();
@ -109,6 +134,24 @@ bool TranslatorVisitor::MUL_vec(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
return true;
}
bool TranslatorVisitor::ADDHN(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
if (size == 0b11) {
return ReservedValue();
}
HighNarrowingOperation(*this, Q, size, Vm, Vn, Vd, HighNarrowingOp::Add);
return true;
}
bool TranslatorVisitor::SUBHN(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
if (size == 0b11) {
return ReservedValue();
}
HighNarrowingOperation(*this, Q, size, Vm, Vn, Vd, HighNarrowingOp::Subtract);
return true;
}
bool TranslatorVisitor::ADDP_vec(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
if (size == 0b11 && !Q) return ReservedValue();
const size_t esize = 8 << size.ZeroExtend<size_t>();