commit
4b43dd33c6
4 changed files with 41 additions and 2 deletions
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@ -157,6 +157,7 @@ if ("A32" IN_LIST DYNARMIC_FRONTENDS)
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frontend/A32/translate/impl/thumb32_control.cpp
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frontend/A32/translate/impl/thumb32_data_processing_register.cpp
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frontend/A32/translate/impl/thumb32_data_processing_modified_immediate.cpp
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frontend/A32/translate/impl/thumb32_data_processing_plain_binary_immediate.cpp
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frontend/A32/translate/impl/thumb32_long_multiply.cpp
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frontend/A32/translate/impl/thumb32_misc.cpp
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frontend/A32/translate/impl/thumb32_multiply.cpp
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@ -73,10 +73,10 @@ INST(thumb32_EOR_imm, "EOR (imm)", "11110v00100Snnnn0vvvdd
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// Data Processing (Plain Binary Immediate)
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//INST(thumb32_ADR, "ADR", "11110-10000011110---------------")
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//INST(thumb32_ADD_imm_2, "ADD (imm)", "11110-100000----0---------------")
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//INST(thumb32_MOVW_imm, "MOVW (imm)", "11110-100100----0---------------")
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INST(thumb32_MOVW_imm, "MOVW (imm)", "11110i100100iiii0iiiddddiiiiiiii")
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//INST(thumb32_ADR, "ADR", "11110-10101011110---------------")
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//INST(thumb32_SUB_imm_2, "SUB (imm)", "11110-101010----0---------------")
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//INST(thumb32_MOVT, "MOVT", "11110-101100----0---------------")
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INST(thumb32_MOVT, "MOVT", "11110i101100iiii0iiiddddiiiiiiii")
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//INST(thumb32_SSAT, "SSAT", "11110-110000----0---------------")
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//INST(thumb32_SSAT16, "SSAT16", "11110-110010----0000----00------")
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//INST(thumb32_SSAT, "SSAT", "11110-110010----0---------------")
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@ -0,0 +1,34 @@
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/* This file is part of the dynarmic project.
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* Copyright (c) 2021 MerryMage
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* SPDX-License-Identifier: 0BSD
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*/
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#include "frontend/A32/translate/impl/translate_thumb.h"
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namespace Dynarmic::A32 {
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bool ThumbTranslatorVisitor::thumb32_MOVT(Imm<1> imm1, Imm<4> imm4, Imm<3> imm3, Reg d, Imm<8> imm8) {
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if (d == Reg::PC) {
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return UnpredictableInstruction();
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}
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const IR::U32 imm16 = ir.Imm32(concatenate(imm4, imm1, imm3, imm8).ZeroExtend() << 16);
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const IR::U32 operand = ir.GetRegister(d);
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const IR::U32 result = ir.Or(ir.And(operand, ir.Imm32(0x0000FFFFU)), imm16);
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ir.SetRegister(d, result);
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return true;
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}
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bool ThumbTranslatorVisitor::thumb32_MOVW_imm(Imm<1> imm1, Imm<4> imm4, Imm<3> imm3, Reg d, Imm<8> imm8) {
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if (d == Reg::PC) {
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return UnpredictableInstruction();
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}
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const IR::U32 imm = ir.Imm32(concatenate(imm4, imm1, imm3, imm8).ZeroExtend());
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ir.SetRegister(d, imm);
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return true;
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}
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} // namespace Dynarmic::A32
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@ -159,6 +159,10 @@ struct ThumbTranslatorVisitor final {
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bool thumb32_TEQ_imm(Imm<1> i, Reg n, Imm<3> imm3, Imm<8> imm8);
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bool thumb32_EOR_imm(Imm<1> i, bool S, Reg n, Imm<3> imm3, Reg d, Imm<8> imm8);
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// thumb32 data processing (plain binary immediate) instructions.
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bool thumb32_MOVT(Imm<1> imm1, Imm<4> imm4, Imm<3> imm3, Reg d, Imm<8> imm8);
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bool thumb32_MOVW_imm(Imm<1> imm1, Imm<4> imm4, Imm<3> imm3, Reg d, Imm<8> imm8);
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// thumb32 miscellaneous control instructions
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bool thumb32_UDF();
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