vfp: Add decoders for VFPv5
These instructions were introduced in the Cortex-M7
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2 changed files with 25 additions and 4 deletions
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@ -22,7 +22,13 @@ using VFPMatcher = Decoder::Matcher<Visitor, u32>;
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template<typename V>
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std::optional<std::reference_wrapper<const VFPMatcher<V>>> DecodeVFP(u32 instruction) {
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static const std::vector<VFPMatcher<V>> table = {
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using Table = std::vector<VFPMatcher<V>>;
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static const struct Tables {
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Table unconditional;
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Table conditional;
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} tables = []{
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Table list = {
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#define INST(fn, name, bitstring) Decoder::detail::detail<VFPMatcher<V>>::GetMatcher(&V::fn, name, bitstring),
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#include "vfp.inc"
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@ -30,8 +36,18 @@ std::optional<std::reference_wrapper<const VFPMatcher<V>>> DecodeVFP(u32 instruc
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};
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if ((instruction & 0xF0000000) == 0xF0000000)
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return std::nullopt; // Don't try matching any unconditional instructions.
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const auto division = std::stable_partition(list.begin(), list.end(), [&](const auto& matcher) {
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return (matcher.GetMask() & 0xF0000000) == 0xF0000000;
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});
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return Tables{
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Table{list.begin(), division},
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Table{division, list.end()},
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};
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}();
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const bool is_unconditional = (instruction & 0xF0000000) == 0xF0000000;
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const Table& table = is_unconditional ? tables.unconditional : tables.conditional;
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const auto matches_instruction = [instruction](const auto& matcher){ return matcher.Matches(instruction); };
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@ -12,6 +12,9 @@ INST(vfp_VFNMS, "VFNMS", "cccc11101D01nnnndddd101zN
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INST(vfp_VFNMA, "VFNMA", "cccc11101D01nnnndddd101zN1M0mmmm") // VFPv4
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INST(vfp_VFMA, "VFMA", "cccc11101D10nnnndddd101zN0M0mmmm") // VFPv4
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INST(vfp_VFMS, "VFMS", "cccc11101D10nnnndddd101zN1M0mmmm") // VFPv4
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//INST(vfp_VSEL, "VSEL", "111111100Dccnnnndddd101zN0M0mmmm") // VFPv5
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//INST(vfp_VMAXNM, "VMAXNNM", "111111101D00nnnndddd101zN0M0mmmm") // VFPv5
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//INST(vfp_VMINNM, "VMINNM", "111111101D00nnnndddd101zN1M0mmmm") // VFPv5
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// Other floating-point data-processing instructions
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INST(vfp_VMOV_imm, "VMOV (immediate)", "cccc11101D11vvvvdddd101z0000vvvv") // VFPv3
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@ -29,6 +32,8 @@ INST(vfp_VCVT_from_int, "VCVT (from int)", "cccc11101D111000dddd101zs
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INST(vfp_VCVT_to_u32, "VCVT (to u32)", "cccc11101D111100dddd101zr1M0mmmm") // VFPv2
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INST(vfp_VCVT_to_s32, "VCVT (to s32)", "cccc11101D111101dddd101zr1M0mmmm") // VFPv2
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//INST(vfp_VCVT_to_fixed, "VCVT (to fixed)", "cccc11101D11111Udddd101zx1i0vvvv") // VFPv3
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//INST(vfp_VRINT_rm, "VRINT{A,N,P,M}", "111111101D1110mmdddd101z01M0mmmm") // VFPv5
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//INST(vfp_VCVT_rm, "VCVT{A,N,P,M}", "111111101D1111mmdddd101zU1M0mmmm") // VFPv5
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// Floating-point move instructions
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INST(vfp_VMOV_u32_f64, "VMOV (core to f64)", "cccc11100000ddddtttt1011D0010000") // VFPv2
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