IR: Remove A32 IR instructions Get{N,Z,V}Flag
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72f8abe11d
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4 changed files with 0 additions and 30 deletions
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@ -629,18 +629,10 @@ static void EmitSetFlag(BlockOfCode& code, A32EmitContext& ctx, IR::Inst* inst,
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}
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}
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}
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}
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void A32EmitX64::EmitA32GetNFlag(A32EmitContext& ctx, IR::Inst* inst) {
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EmitGetFlag(code, ctx, inst, NZCV::x64_n_flag_bit);
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}
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void A32EmitX64::EmitA32SetNFlag(A32EmitContext& ctx, IR::Inst* inst) {
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void A32EmitX64::EmitA32SetNFlag(A32EmitContext& ctx, IR::Inst* inst) {
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EmitSetFlag(code, ctx, inst, NZCV::x64_n_flag_bit);
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EmitSetFlag(code, ctx, inst, NZCV::x64_n_flag_bit);
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}
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}
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void A32EmitX64::EmitA32GetZFlag(A32EmitContext& ctx, IR::Inst* inst) {
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EmitGetFlag(code, ctx, inst, NZCV::x64_z_flag_bit);
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}
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void A32EmitX64::EmitA32SetZFlag(A32EmitContext& ctx, IR::Inst* inst) {
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void A32EmitX64::EmitA32SetZFlag(A32EmitContext& ctx, IR::Inst* inst) {
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EmitSetFlag(code, ctx, inst, NZCV::x64_z_flag_bit);
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EmitSetFlag(code, ctx, inst, NZCV::x64_z_flag_bit);
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}
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}
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@ -653,10 +645,6 @@ void A32EmitX64::EmitA32SetCFlag(A32EmitContext& ctx, IR::Inst* inst) {
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EmitSetFlag(code, ctx, inst, NZCV::x64_c_flag_bit);
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EmitSetFlag(code, ctx, inst, NZCV::x64_c_flag_bit);
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}
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}
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void A32EmitX64::EmitA32GetVFlag(A32EmitContext& ctx, IR::Inst* inst) {
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EmitGetFlag(code, ctx, inst, NZCV::x64_v_flag_bit);
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}
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void A32EmitX64::EmitA32SetVFlag(A32EmitContext& ctx, IR::Inst* inst) {
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void A32EmitX64::EmitA32SetVFlag(A32EmitContext& ctx, IR::Inst* inst) {
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EmitSetFlag(code, ctx, inst, NZCV::x64_v_flag_bit);
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EmitSetFlag(code, ctx, inst, NZCV::x64_v_flag_bit);
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}
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}
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@ -155,10 +155,7 @@ bool Inst::IsMemoryReadOrWrite() const {
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bool Inst::ReadsFromCPSR() const {
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bool Inst::ReadsFromCPSR() const {
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switch (op) {
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switch (op) {
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case Opcode::A32GetCpsr:
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case Opcode::A32GetCpsr:
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case Opcode::A32GetNFlag:
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case Opcode::A32GetZFlag:
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case Opcode::A32GetCFlag:
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case Opcode::A32GetCFlag:
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case Opcode::A32GetVFlag:
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case Opcode::A32GetGEFlags:
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case Opcode::A32GetGEFlags:
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case Opcode::A32UpdateUpperLocationDescriptor:
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case Opcode::A32UpdateUpperLocationDescriptor:
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case Opcode::A64GetCFlag:
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case Opcode::A64GetCFlag:
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@ -22,13 +22,10 @@ A32OPC(SetCpsr, Void, U32
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A32OPC(SetCpsrNZCV, Void, NZCV )
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A32OPC(SetCpsrNZCV, Void, NZCV )
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A32OPC(SetCpsrNZCVRaw, Void, U32 )
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A32OPC(SetCpsrNZCVRaw, Void, U32 )
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A32OPC(SetCpsrNZCVQ, Void, U32 )
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A32OPC(SetCpsrNZCVQ, Void, U32 )
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A32OPC(GetNFlag, U1, )
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A32OPC(SetNFlag, Void, U1 )
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A32OPC(SetNFlag, Void, U1 )
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A32OPC(GetZFlag, U1, )
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A32OPC(SetZFlag, Void, U1 )
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A32OPC(SetZFlag, Void, U1 )
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A32OPC(GetCFlag, U1, )
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A32OPC(GetCFlag, U1, )
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A32OPC(SetCFlag, Void, U1 )
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A32OPC(SetCFlag, Void, U1 )
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A32OPC(GetVFlag, U1, )
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A32OPC(SetVFlag, Void, U1 )
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A32OPC(SetVFlag, Void, U1 )
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A32OPC(OrQFlag, Void, U1 )
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A32OPC(OrQFlag, Void, U1 )
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A32OPC(GetGEFlags, U32, )
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A32OPC(GetGEFlags, U32, )
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@ -170,18 +170,10 @@ void A32GetSetElimination(IR::Block& block) {
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do_set(cpsr_info.n, inst->GetArg(0), inst);
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do_set(cpsr_info.n, inst->GetArg(0), inst);
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break;
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break;
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}
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}
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case IR::Opcode::A32GetNFlag: {
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do_get(cpsr_info.n, inst);
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break;
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}
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case IR::Opcode::A32SetZFlag: {
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case IR::Opcode::A32SetZFlag: {
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do_set(cpsr_info.z, inst->GetArg(0), inst);
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do_set(cpsr_info.z, inst->GetArg(0), inst);
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break;
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break;
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}
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}
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case IR::Opcode::A32GetZFlag: {
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do_get(cpsr_info.z, inst);
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break;
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}
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case IR::Opcode::A32SetCFlag: {
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case IR::Opcode::A32SetCFlag: {
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do_set(cpsr_info.c, inst->GetArg(0), inst);
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do_set(cpsr_info.c, inst->GetArg(0), inst);
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break;
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break;
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@ -194,10 +186,6 @@ void A32GetSetElimination(IR::Block& block) {
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do_set(cpsr_info.v, inst->GetArg(0), inst);
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do_set(cpsr_info.v, inst->GetArg(0), inst);
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break;
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break;
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}
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}
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case IR::Opcode::A32GetVFlag: {
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do_get(cpsr_info.v, inst);
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break;
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}
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case IR::Opcode::A32SetGEFlags: {
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case IR::Opcode::A32SetGEFlags: {
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do_set(cpsr_info.ge, inst->GetArg(0), inst);
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do_set(cpsr_info.ge, inst->GetArg(0), inst);
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break;
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break;
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