IR: Remove A32 IR instructions Get{N,Z,V}Flag

This commit is contained in:
Merry 2021-08-12 13:06:15 +01:00
parent 72f8abe11d
commit 615ce8c7c5
4 changed files with 0 additions and 30 deletions

View file

@ -629,18 +629,10 @@ static void EmitSetFlag(BlockOfCode& code, A32EmitContext& ctx, IR::Inst* inst,
} }
} }
void A32EmitX64::EmitA32GetNFlag(A32EmitContext& ctx, IR::Inst* inst) {
EmitGetFlag(code, ctx, inst, NZCV::x64_n_flag_bit);
}
void A32EmitX64::EmitA32SetNFlag(A32EmitContext& ctx, IR::Inst* inst) { void A32EmitX64::EmitA32SetNFlag(A32EmitContext& ctx, IR::Inst* inst) {
EmitSetFlag(code, ctx, inst, NZCV::x64_n_flag_bit); EmitSetFlag(code, ctx, inst, NZCV::x64_n_flag_bit);
} }
void A32EmitX64::EmitA32GetZFlag(A32EmitContext& ctx, IR::Inst* inst) {
EmitGetFlag(code, ctx, inst, NZCV::x64_z_flag_bit);
}
void A32EmitX64::EmitA32SetZFlag(A32EmitContext& ctx, IR::Inst* inst) { void A32EmitX64::EmitA32SetZFlag(A32EmitContext& ctx, IR::Inst* inst) {
EmitSetFlag(code, ctx, inst, NZCV::x64_z_flag_bit); EmitSetFlag(code, ctx, inst, NZCV::x64_z_flag_bit);
} }
@ -653,10 +645,6 @@ void A32EmitX64::EmitA32SetCFlag(A32EmitContext& ctx, IR::Inst* inst) {
EmitSetFlag(code, ctx, inst, NZCV::x64_c_flag_bit); EmitSetFlag(code, ctx, inst, NZCV::x64_c_flag_bit);
} }
void A32EmitX64::EmitA32GetVFlag(A32EmitContext& ctx, IR::Inst* inst) {
EmitGetFlag(code, ctx, inst, NZCV::x64_v_flag_bit);
}
void A32EmitX64::EmitA32SetVFlag(A32EmitContext& ctx, IR::Inst* inst) { void A32EmitX64::EmitA32SetVFlag(A32EmitContext& ctx, IR::Inst* inst) {
EmitSetFlag(code, ctx, inst, NZCV::x64_v_flag_bit); EmitSetFlag(code, ctx, inst, NZCV::x64_v_flag_bit);
} }

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@ -155,10 +155,7 @@ bool Inst::IsMemoryReadOrWrite() const {
bool Inst::ReadsFromCPSR() const { bool Inst::ReadsFromCPSR() const {
switch (op) { switch (op) {
case Opcode::A32GetCpsr: case Opcode::A32GetCpsr:
case Opcode::A32GetNFlag:
case Opcode::A32GetZFlag:
case Opcode::A32GetCFlag: case Opcode::A32GetCFlag:
case Opcode::A32GetVFlag:
case Opcode::A32GetGEFlags: case Opcode::A32GetGEFlags:
case Opcode::A32UpdateUpperLocationDescriptor: case Opcode::A32UpdateUpperLocationDescriptor:
case Opcode::A64GetCFlag: case Opcode::A64GetCFlag:

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@ -22,13 +22,10 @@ A32OPC(SetCpsr, Void, U32
A32OPC(SetCpsrNZCV, Void, NZCV ) A32OPC(SetCpsrNZCV, Void, NZCV )
A32OPC(SetCpsrNZCVRaw, Void, U32 ) A32OPC(SetCpsrNZCVRaw, Void, U32 )
A32OPC(SetCpsrNZCVQ, Void, U32 ) A32OPC(SetCpsrNZCVQ, Void, U32 )
A32OPC(GetNFlag, U1, )
A32OPC(SetNFlag, Void, U1 ) A32OPC(SetNFlag, Void, U1 )
A32OPC(GetZFlag, U1, )
A32OPC(SetZFlag, Void, U1 ) A32OPC(SetZFlag, Void, U1 )
A32OPC(GetCFlag, U1, ) A32OPC(GetCFlag, U1, )
A32OPC(SetCFlag, Void, U1 ) A32OPC(SetCFlag, Void, U1 )
A32OPC(GetVFlag, U1, )
A32OPC(SetVFlag, Void, U1 ) A32OPC(SetVFlag, Void, U1 )
A32OPC(OrQFlag, Void, U1 ) A32OPC(OrQFlag, Void, U1 )
A32OPC(GetGEFlags, U32, ) A32OPC(GetGEFlags, U32, )

View file

@ -170,18 +170,10 @@ void A32GetSetElimination(IR::Block& block) {
do_set(cpsr_info.n, inst->GetArg(0), inst); do_set(cpsr_info.n, inst->GetArg(0), inst);
break; break;
} }
case IR::Opcode::A32GetNFlag: {
do_get(cpsr_info.n, inst);
break;
}
case IR::Opcode::A32SetZFlag: { case IR::Opcode::A32SetZFlag: {
do_set(cpsr_info.z, inst->GetArg(0), inst); do_set(cpsr_info.z, inst->GetArg(0), inst);
break; break;
} }
case IR::Opcode::A32GetZFlag: {
do_get(cpsr_info.z, inst);
break;
}
case IR::Opcode::A32SetCFlag: { case IR::Opcode::A32SetCFlag: {
do_set(cpsr_info.c, inst->GetArg(0), inst); do_set(cpsr_info.c, inst->GetArg(0), inst);
break; break;
@ -194,10 +186,6 @@ void A32GetSetElimination(IR::Block& block) {
do_set(cpsr_info.v, inst->GetArg(0), inst); do_set(cpsr_info.v, inst->GetArg(0), inst);
break; break;
} }
case IR::Opcode::A32GetVFlag: {
do_get(cpsr_info.v, inst);
break;
}
case IR::Opcode::A32SetGEFlags: { case IR::Opcode::A32SetGEFlags: {
do_set(cpsr_info.ge, inst->GetArg(0), inst); do_set(cpsr_info.ge, inst->GetArg(0), inst);
break; break;