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thumb32: Implement UMLAL

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This commit is contained in:
Lioncash 2021-02-07 17:34:05 -05:00
parent 5859105a61
commit 8320c56a6e
3 changed files with 24 additions and 1 deletions
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2
src/frontend/A32/decoder/thumb32.inc
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@ -287,7 +287,7 @@ INST(thumb32_SMLAL, "SMLAL", "111110111100nnnnllllhh
//INST(thumb32_SMLALXY, "SMLALXY", "111110111100------------10------") //INST(thumb32_SMLALXY, "SMLALXY", "111110111100------------10------")
//INST(thumb32_SMLALD, "SMLALD", "111110111100------------110-----") //INST(thumb32_SMLALD, "SMLALD", "111110111100------------110-----")
//INST(thumb32_SMLSLD, "SMLSLD", "111110111101------------110-----") //INST(thumb32_SMLSLD, "SMLSLD", "111110111101------------110-----")
//INST(thumb32_UMLAL, "UMLAL", "111110111110------------0000----") INST(thumb32_UMLAL, "UMLAL", "111110111110nnnnllllhhhh0000mmmm")
//INST(thumb32_UMAAL, "UMAAL", "111110111110------------0110----") //INST(thumb32_UMAAL, "UMAAL", "111110111110------------0110----")
// Coprocessor // Coprocessor

22
src/frontend/A32/translate/impl/thumb32_long_multiply.cpp
View file

@ -49,6 +49,28 @@ bool ThumbTranslatorVisitor::thumb32_SMULL(Reg n, Reg dLo, Reg dHi, Reg m) {
return true; return true;
} }
bool ThumbTranslatorVisitor::thumb32_UMLAL(Reg n, Reg dLo, Reg dHi, Reg m) {
if (dLo == Reg::PC || dHi == Reg::PC || n == Reg::PC || m == Reg::PC) {
return UnpredictableInstruction();
}
if (dHi == dLo) {
return UnpredictableInstruction();
}
const auto n64 = ir.ZeroExtendWordToLong(ir.GetRegister(n));
const auto m64 = ir.ZeroExtendWordToLong(ir.GetRegister(m));
const auto product = ir.Mul(n64, m64);
const auto addend = ir.Pack2x32To1x64(ir.GetRegister(dLo), ir.GetRegister(dHi));
const auto result = ir.Add(product, addend);
const auto lo = ir.LeastSignificantWord(result);
const auto hi = ir.MostSignificantWord(result).result;
ir.SetRegister(dLo, lo);
ir.SetRegister(dHi, hi);
return true;
}
bool ThumbTranslatorVisitor::thumb32_UMULL(Reg n, Reg dLo, Reg dHi, Reg m) { bool ThumbTranslatorVisitor::thumb32_UMULL(Reg n, Reg dLo, Reg dHi, Reg m) {
if (dLo == Reg::PC || dHi == Reg::PC || n == Reg::PC || m == Reg::PC) { if (dLo == Reg::PC || dHi == Reg::PC || n == Reg::PC || m == Reg::PC) {
return UnpredictableInstruction(); return UnpredictableInstruction();

1
src/frontend/A32/translate/impl/translate_thumb.h
View file

@ -119,6 +119,7 @@ struct ThumbTranslatorVisitor final {
// thumb32 long multiply, long multiply accumulate, and divide instructions // thumb32 long multiply, long multiply accumulate, and divide instructions
bool thumb32_SMLAL(Reg n, Reg dLo, Reg dHi, Reg m); bool thumb32_SMLAL(Reg n, Reg dLo, Reg dHi, Reg m);
bool thumb32_SMULL(Reg n, Reg dLo, Reg dHi, Reg m); bool thumb32_SMULL(Reg n, Reg dLo, Reg dHi, Reg m);
bool thumb32_UMLAL(Reg n, Reg dLo, Reg dHi, Reg m);
bool thumb32_UMULL(Reg n, Reg dLo, Reg dHi, Reg m); bool thumb32_UMULL(Reg n, Reg dLo, Reg dHi, Reg m);
// thumb32 miscellaneous instructions // thumb32 miscellaneous instructions