backend/x64: Bugfix: A32 frontent also uses FPSCR.QC
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473bbd422e
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95a1ebfb97
2 changed files with 3 additions and 1 deletions
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@ -172,6 +172,7 @@ u32 A32JitState::Fpscr() const {
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FPSCR |= (mxcsr & 0b0000000000001); // IOC = IE
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FPSCR |= (mxcsr & 0b0000000000001); // IOC = IE
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FPSCR |= (mxcsr & 0b0000000111100) >> 1; // IXC, UFC, OFC, DZC = PE, UE, OE, ZE
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FPSCR |= (mxcsr & 0b0000000111100) >> 1; // IXC, UFC, OFC, DZC = PE, UE, OE, ZE
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FPSCR |= fpsr_exc;
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FPSCR |= fpsr_exc;
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FPSCR |= fpsr_qc != 0 ? 1 << 27 : 0;
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return FPSCR;
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return FPSCR;
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}
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}
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@ -184,6 +185,7 @@ void A32JitState::SetFpscr(u32 FPSCR) {
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upper_location_descriptor |= FPSCR & FPSCR_MODE_MASK;
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upper_location_descriptor |= FPSCR & FPSCR_MODE_MASK;
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fpsr_nzcv = FPSCR & FPSCR_NZCV_MASK;
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fpsr_nzcv = FPSCR & FPSCR_NZCV_MASK;
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fpsr_qc = (FPSCR >> 27) & 1;
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guest_MXCSR = 0x00001f80;
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guest_MXCSR = 0x00001f80;
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asimd_MXCSR = 0x00009fc0;
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asimd_MXCSR = 0x00009fc0;
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@ -53,7 +53,7 @@ struct A32JitState {
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void ResetRSB();
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void ResetRSB();
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u32 fpsr_exc = 0;
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u32 fpsr_exc = 0;
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u32 fpsr_qc = 0; // Dummy value
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u32 fpsr_qc = 0;
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u32 fpsr_nzcv = 0;
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u32 fpsr_nzcv = 0;
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u32 Fpscr() const;
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u32 Fpscr() const;
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void SetFpscr(u32 FPSCR);
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void SetFpscr(u32 FPSCR);
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