A64: Implement SRSHR (scalar)
This commit is contained in:
parent
7c0250e9f8
commit
998aef07f6
2 changed files with 17 additions and 1 deletions
|
@ -470,7 +470,7 @@ INST(CMEQ_reg_1, "CMEQ (register)", "01111
|
||||||
// Data Processing - FP and SIMD - SIMD Scalar shift by immediate
|
// Data Processing - FP and SIMD - SIMD Scalar shift by immediate
|
||||||
INST(SSHR_1, "SSHR", "010111110IIIIiii000001nnnnnddddd")
|
INST(SSHR_1, "SSHR", "010111110IIIIiii000001nnnnnddddd")
|
||||||
INST(SSRA_1, "SSRA", "010111110IIIIiii000101nnnnnddddd")
|
INST(SSRA_1, "SSRA", "010111110IIIIiii000101nnnnnddddd")
|
||||||
//INST(SRSHR_1, "SRSHR", "010111110IIIIiii001001nnnnnddddd")
|
INST(SRSHR_1, "SRSHR", "010111110IIIIiii001001nnnnnddddd")
|
||||||
//INST(SRSRA_1, "SRSRA", "010111110IIIIiii001101nnnnnddddd")
|
//INST(SRSRA_1, "SRSRA", "010111110IIIIiii001101nnnnnddddd")
|
||||||
INST(SHL_1, "SHL", "010111110IIIIiii010101nnnnnddddd")
|
INST(SHL_1, "SHL", "010111110IIIIiii010101nnnnnddddd")
|
||||||
//INST(SQSHL_imm_1, "SQSHL (immediate)", "010111110IIIIiii011101nnnnnddddd")
|
//INST(SQSHL_imm_1, "SQSHL (immediate)", "010111110IIIIiii011101nnnnnddddd")
|
||||||
|
|
|
@ -97,6 +97,22 @@ bool TranslatorVisitor::SRI_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) {
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
bool TranslatorVisitor::SRSHR_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) {
|
||||||
|
if (!immh.Bit<3>()) {
|
||||||
|
return ReservedValue();
|
||||||
|
}
|
||||||
|
|
||||||
|
const size_t esize = 64;
|
||||||
|
const u8 shift_amount = static_cast<u8>((esize * 2) - concatenate(immh, immb).ZeroExtend());
|
||||||
|
|
||||||
|
const IR::U64 operand = V_scalar(esize, Vn);
|
||||||
|
const IR::U64 round_bit = ir.LogicalShiftRight(ir.LogicalShiftLeft(operand, ir.Imm8(64 - shift_amount)), ir.Imm8(63));
|
||||||
|
const IR::U64 result = ir.Add(ir.ArithmeticShiftRight(operand, ir.Imm8(shift_amount)), round_bit);
|
||||||
|
|
||||||
|
V_scalar(esize, Vd, result);
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
|
||||||
bool TranslatorVisitor::SSHR_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) {
|
bool TranslatorVisitor::SSHR_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) {
|
||||||
if (!immh.Bit<3>()) {
|
if (!immh.Bit<3>()) {
|
||||||
return ReservedValue();
|
return ReservedValue();
|
||||||
|
|
Loading…
Reference in a new issue