mirrors/dynarmic
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

A64: Implement CMHI, CMHS

Browse source
This commit is contained in:
MerryMage 2018-02-13 18:20:18 +00:00
parent e2b9b7c5b0
commit 9d85991906
2 changed files with 30 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
src/frontend/A64/decoder/a64.inc
View file

@ -748,8 +748,8 @@ INST(ORN_asimd, "ORN (vector)", "0Q001
//INST(URHADD, "URHADD", "0Q101110zz1mmmmm000101nnnnnddddd") //INST(URHADD, "URHADD", "0Q101110zz1mmmmm000101nnnnnddddd")
//INST(UHSUB, "UHSUB", "0Q101110zz1mmmmm001001nnnnnddddd") //INST(UHSUB, "UHSUB", "0Q101110zz1mmmmm001001nnnnnddddd")
//INST(UQSUB_2, "UQSUB", "0Q101110zz1mmmmm001011nnnnnddddd") //INST(UQSUB_2, "UQSUB", "0Q101110zz1mmmmm001011nnnnnddddd")
//INST(CMHI_2, "CMHI (register)", "0Q101110zz1mmmmm001101nnnnnddddd") INST(CMHI_2, "CMHI (register)", "0Q101110zz1mmmmm001101nnnnnddddd")
//INST(CMHS_2, "CMHS (register)", "0Q101110zz1mmmmm001111nnnnnddddd") INST(CMHS_2, "CMHS (register)", "0Q101110zz1mmmmm001111nnnnnddddd")
//INST(USHL_2, "USHL", "0Q101110zz1mmmmm010001nnnnnddddd") //INST(USHL_2, "USHL", "0Q101110zz1mmmmm010001nnnnnddddd")
//INST(UQSHL_reg_2, "UQSHL (register)", "0Q101110zz1mmmmm010011nnnnnddddd") //INST(UQSHL_reg_2, "UQSHL (register)", "0Q101110zz1mmmmm010011nnnnnddddd")
//INST(URSHL_2, "URSHL", "0Q101110zz1mmmmm010101nnnnnddddd") //INST(URSHL_2, "URSHL", "0Q101110zz1mmmmm010101nnnnnddddd")

28
src/frontend/A64/translate/impl/simd_three_same.cpp
View file

@ -153,6 +153,34 @@ bool TranslatorVisitor::BIC_asimd_reg(bool Q, Vec Vm, Vec Vn, Vec Vd) {
return true; return true;
} }
bool TranslatorVisitor::CMHI_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
if (size == 0b11 && !Q) {
return ReservedValue();
}
const size_t esize = 8 << size.ZeroExtend<size_t>();
const size_t datasize = Q ? 128 : 64;
const IR::U128 operand1 = V(datasize, Vn);
const IR::U128 operand2 = V(datasize, Vm);
const IR::U128 result = ir.VectorGreaterUnsigned(esize, operand1, operand2);
V(datasize, Vd, result);
return true;
}
bool TranslatorVisitor::CMHS_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
if (size == 0b11 && !Q) {
return ReservedValue();
}
const size_t esize = 8 << size.ZeroExtend<size_t>();
const size_t datasize = Q ? 128 : 64;
const IR::U128 operand1 = V(datasize, Vn);
const IR::U128 operand2 = V(datasize, Vm);
const IR::U128 result = ir.VectorGreaterEqualUnsigned(esize, operand1, operand2);
V(datasize, Vd, result);
return true;
}
bool TranslatorVisitor::UMAX(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { bool TranslatorVisitor::UMAX(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
if (size == 0b11) { if (size == 0b11) {
return ReservedValue(); return ReservedValue();