mirrors/dynarmic
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

frontend/ir_emitter: Add opcodes for signed saturated left shifts with unsigned saturation

Browse source
This commit is contained in:
Lioncash 2019-04-12 15:47:35 -04:00 committed by MerryMage
parent b91c6c8bae
commit a4cadf1cd9
5 changed files with 78 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

54
src/backend/x64/emit_x64_vector.cpp
View file

@ -3871,6 +3871,60 @@ void EmitX64::EmitVectorSignedSaturatedShiftLeft64(EmitContext& ctx, IR::Inst* i
EmitTwoArgumentFallbackWithSaturation(code, ctx, inst, VectorSignedSaturatedShiftLeft<s64>);
}
template <typename T, typename U = std::make_unsigned_t<T>>
static bool VectorSignedSaturatedShiftLeftUnsigned(VectorArray<T>& dst, const VectorArray<T>& data, const VectorArray<T>& shift_values) {
static_assert(std::is_signed_v<T>, "T must be signed.");
constexpr size_t bit_size_minus_one = Common::BitSize<T>() - 1;
bool qc_flag = false;
for (size_t i = 0; i < dst.size(); i++) {
const T element = data[i];
const T shift = std::clamp<T>(static_cast<T>(Common::SignExtend<8>(shift_values[i] & 0xFF)),
-static_cast<T>(bit_size_minus_one), std::numeric_limits<T>::max());
if (element == 0) {
dst[i] = 0;
} else if (element < 0) {
dst[i] = 0;
qc_flag = true;
} else if (shift < 0) {
dst[i] = static_cast<T>(element >> -shift);
} else if (static_cast<U>(shift) > bit_size_minus_one) {
dst[i] = static_cast<T>(std::numeric_limits<U>::max());
qc_flag = true;
} else {
const U shifted = static_cast<U>(element) << static_cast<U>(shift);
const U shifted_test = shifted >> static_cast<U>(shift);
if (shifted_test != static_cast<U>(element)) {
dst[i] = static_cast<T>(std::numeric_limits<U>::max());
qc_flag = true;
} else {
dst[i] = shifted;
}
}
}
return qc_flag;
}
void EmitX64::EmitVectorSignedSaturatedShiftLeftUnsigned8(EmitContext& ctx, IR::Inst* inst) {
EmitTwoArgumentFallbackWithSaturation(code, ctx, inst, VectorSignedSaturatedShiftLeftUnsigned<s8>);
}
void EmitX64::EmitVectorSignedSaturatedShiftLeftUnsigned16(EmitContext& ctx, IR::Inst* inst) {
EmitTwoArgumentFallbackWithSaturation(code, ctx, inst, VectorSignedSaturatedShiftLeftUnsigned<s16>);
}
void EmitX64::EmitVectorSignedSaturatedShiftLeftUnsigned32(EmitContext& ctx, IR::Inst* inst) {
EmitTwoArgumentFallbackWithSaturation(code, ctx, inst, VectorSignedSaturatedShiftLeftUnsigned<s32>);
}
void EmitX64::EmitVectorSignedSaturatedShiftLeftUnsigned64(EmitContext& ctx, IR::Inst* inst) {
EmitTwoArgumentFallbackWithSaturation(code, ctx, inst, VectorSignedSaturatedShiftLeftUnsigned<s64>);
}
void EmitX64::EmitVectorSub8(EmitContext& ctx, IR::Inst* inst) {
EmitVectorOperation(code, ctx, inst, &Xbyak::CodeGenerator::psubb);
}

15
src/frontend/ir/ir_emitter.cpp
View file

@ -1661,6 +1661,21 @@ U128 IREmitter::VectorSignedSaturatedShiftLeft(size_t esize, const U128& a, cons
return {};
}
U128 IREmitter::VectorSignedSaturatedShiftLeftUnsigned(size_t esize, const U128& a, const U128& b) {
switch (esize) {
case 8:
return Inst<U128>(Opcode::VectorSignedSaturatedShiftLeftUnsigned8, a, b);
case 16:
return Inst<U128>(Opcode::VectorSignedSaturatedShiftLeftUnsigned16, a, b);
case 32:
return Inst<U128>(Opcode::VectorSignedSaturatedShiftLeftUnsigned32, a, b);
case 64:
return Inst<U128>(Opcode::VectorSignedSaturatedShiftLeftUnsigned64, a, b);
}
UNREACHABLE();
return {};
}
U128 IREmitter::VectorSub(size_t esize, const U128& a, const U128& b) {
switch (esize) {
case 8:

1
src/frontend/ir/ir_emitter.h
View file

@ -279,6 +279,7 @@ public:
U128 VectorSignedSaturatedNarrowToUnsigned(size_t original_esize, const U128& a);
U128 VectorSignedSaturatedNeg(size_t esize, const U128& a);
U128 VectorSignedSaturatedShiftLeft(size_t esize, const U128& a, const U128& b);
U128 VectorSignedSaturatedShiftLeftUnsigned(size_t esize, const U128& a, const U128& b);
U128 VectorSub(size_t esize, const U128& a, const U128& b);
Table VectorTable(std::vector<U128> values);
U128 VectorTableLookup(const U128& defaults, const Table& table, const U128& indices);

4
src/frontend/ir/microinstruction.cpp
View file

@ -384,6 +384,10 @@ bool Inst::WritesToFPSRCumulativeSaturationBit() const {
case Opcode::VectorSignedSaturatedShiftLeft16:
case Opcode::VectorSignedSaturatedShiftLeft32:
case Opcode::VectorSignedSaturatedShiftLeft64:
case Opcode::VectorSignedSaturatedShiftLeftUnsigned8:
case Opcode::VectorSignedSaturatedShiftLeftUnsigned16:
case Opcode::VectorSignedSaturatedShiftLeftUnsigned32:
case Opcode::VectorSignedSaturatedShiftLeftUnsigned64:
case Opcode::VectorUnsignedSaturatedAccumulateSigned8:
case Opcode::VectorUnsignedSaturatedAccumulateSigned16:
case Opcode::VectorUnsignedSaturatedAccumulateSigned32:

4
src/frontend/ir/opcodes.inc
View file

@ -428,6 +428,10 @@ OPCODE(VectorSignedSaturatedShiftLeft8, U128, U128
OPCODE(VectorSignedSaturatedShiftLeft16, U128, U128, U128 )
OPCODE(VectorSignedSaturatedShiftLeft32, U128, U128, U128 )
OPCODE(VectorSignedSaturatedShiftLeft64, U128, U128, U128 )
OPCODE(VectorSignedSaturatedShiftLeftUnsigned8, U128, U128, U128 )
OPCODE(VectorSignedSaturatedShiftLeftUnsigned16, U128, U128, U128 )
OPCODE(VectorSignedSaturatedShiftLeftUnsigned32, U128, U128, U128 )
OPCODE(VectorSignedSaturatedShiftLeftUnsigned64, U128, U128, U128 )
OPCODE(VectorSub8, U128, U128, U128 )
OPCODE(VectorSub16, U128, U128, U128 )
OPCODE(VectorSub32, U128, U128, U128 )