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backend/arm64: FPVectorToHalf32 implementation

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Macdu 2022-10-18 00:29:47 +02:00 committed by merry
parent 5e2206d0e9
commit ad6a04c584
1 changed files with 13 additions and 4 deletions
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17
src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp
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@ -630,10 +630,19 @@ void EmitIR<IR::Opcode::FPVectorSub64>(oaknut::CodeGenerator& code, EmitContext&
template<> template<>
void EmitIR<IR::Opcode::FPVectorToHalf32>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { void EmitIR<IR::Opcode::FPVectorToHalf32>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
(void)code; auto args = ctx.reg_alloc.GetArgumentInfo(inst);
(void)ctx; const auto rounding_mode = static_cast<FP::RoundingMode>(args[1].GetImmediateU8());
(void)inst; ASSERT(rounding_mode == FP::RoundingMode::ToNearest_TieEven);
ASSERT_FALSE("Unimplemented"); const bool fpcr_controlled = args[2].GetImmediateU1();
auto Dresult = ctx.reg_alloc.WriteD(inst);
auto Qoperand = ctx.reg_alloc.ReadQ(args[0]);
RegAlloc::Realize(Dresult, Qoperand);
ctx.fpsr.Load();
MaybeStandardFPSCRValue(code, ctx, fpcr_controlled, [&] {
code.FCVTN(Dresult->H4(), Qoperand->S4());
});
} }
template<> template<>