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thumb32: Implement ADD (reg)

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This commit is contained in:
MerryMage 2021-03-06 19:39:37 +00:00
parent 41ac9971f4
commit af33155ef8
3 changed files with 21 additions and 1 deletions
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2
src/frontend/A32/decoder/thumb32.inc
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@ -40,7 +40,7 @@ INST(thumb32_TEQ_reg, "TEQ (reg)", "111010101001nnnn0vvv11
INST(thumb32_EOR_reg, "EOR (reg)", "11101010100Snnnn0vvvddddvvttmmmm")
INST(thumb32_PKH, "PKH", "111010101100nnnn0vvvddddvvt0mmmm")
INST(thumb32_CMN_reg, "CMN (reg)", "111010110001nnnn0vvv1111vvttmmmm")
//INST(thumb32_ADD_reg, "ADD (reg)", "11101011000---------------------")
INST(thumb32_ADD_reg, "ADD (reg)", "11101011000Snnnn0vvvddddvvttmmmm")
//INST(thumb32_ADC_reg, "ADC (reg)", "11101011010---------------------")
//INST(thumb32_SBC_reg, "SBC (reg)", "11101011011---------------------")
//INST(thumb32_CMP_reg, "CMP (reg)", "111010111011--------1111--------")

19
src/frontend/A32/translate/impl/thumb32_data_processing_shifted_register.cpp
View file

@ -185,4 +185,23 @@ bool ThumbTranslatorVisitor::thumb32_CMN_reg(Reg n, Imm<3> imm3, Imm<2> imm2, Sh
return true;
}
bool ThumbTranslatorVisitor::thumb32_ADD_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m) {
ASSERT_MSG(!(d == Reg::PC && S), "Decode error");
if ((d == Reg::PC && !S) || n == Reg::PC || m == Reg::PC) {
return UnpredictableInstruction();
}
const auto shifted = EmitImmShift(ir.GetRegister(m), type, imm3, imm2, ir.GetCFlag());
const auto result = ir.AddWithCarry(ir.GetRegister(n), shifted.result, ir.Imm1(0));
ir.SetRegister(d, result.result);
if (S) {
ir.SetNFlag(ir.MostSignificantBit(result.result));
ir.SetZFlag(ir.IsZero(result.result));
ir.SetCFlag(result.carry);
ir.SetVFlag(result.overflow);
}
return true;
}
} // namespace Dynarmic::A32

1
src/frontend/A32/translate/impl/translate_thumb.h
View file

@ -183,6 +183,7 @@ struct ThumbTranslatorVisitor final {
bool thumb32_EOR_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m);
bool thumb32_PKH(Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, Imm<1> tb, Reg m);
bool thumb32_CMN_reg(Reg n, Imm<3> imm3, Imm<2> imm2, ShiftType type, Reg m);
bool thumb32_ADD_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m);
// thumb32 data processing (modified immediate) instructions
bool thumb32_TST_imm(Imm<1> i, Reg n, Imm<3> imm3, Imm<8> imm8);