thumb32: Implement CMN (reg)

This commit is contained in:
MerryMage 2021-03-06 19:35:27 +00:00
parent e7ecd3a7ee
commit 41ac9971f4
3 changed files with 17 additions and 1 deletions

View file

@ -39,7 +39,7 @@ INST(thumb32_ORN_reg, "ORN (reg)", "11101010011Snnnn0vvvdd
INST(thumb32_TEQ_reg, "TEQ (reg)", "111010101001nnnn0vvv1111vvttmmmm")
INST(thumb32_EOR_reg, "EOR (reg)", "11101010100Snnnn0vvvddddvvttmmmm")
INST(thumb32_PKH, "PKH", "111010101100nnnn0vvvddddvvt0mmmm")
//INST(thumb32_CMN_reg, "CMN (reg)", "111010110001--------1111--------")
INST(thumb32_CMN_reg, "CMN (reg)", "111010110001nnnn0vvv1111vvttmmmm")
//INST(thumb32_ADD_reg, "ADD (reg)", "11101011000---------------------")
//INST(thumb32_ADC_reg, "ADC (reg)", "11101011010---------------------")
//INST(thumb32_SBC_reg, "SBC (reg)", "11101011011---------------------")

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@ -170,4 +170,19 @@ bool ThumbTranslatorVisitor::thumb32_PKH(Reg n, Imm<3> imm3, Reg d, Imm<2> imm2,
return true;
}
bool ThumbTranslatorVisitor::thumb32_CMN_reg(Reg n, Imm<3> imm3, Imm<2> imm2, ShiftType type, Reg m) {
if (n == Reg::PC || m == Reg::PC) {
return UnpredictableInstruction();
}
const auto shifted = EmitImmShift(ir.GetRegister(m), type, imm3, imm2, ir.GetCFlag());
const auto result = ir.AddWithCarry(ir.GetRegister(n), shifted.result, ir.Imm1(0));
ir.SetNFlag(ir.MostSignificantBit(result.result));
ir.SetZFlag(ir.IsZero(result.result));
ir.SetCFlag(result.carry);
ir.SetVFlag(result.overflow);
return true;
}
} // namespace Dynarmic::A32

View file

@ -182,6 +182,7 @@ struct ThumbTranslatorVisitor final {
bool thumb32_TEQ_reg(Reg n, Imm<3> imm3, Imm<2> imm2, ShiftType type, Reg m);
bool thumb32_EOR_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m);
bool thumb32_PKH(Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, Imm<1> tb, Reg m);
bool thumb32_CMN_reg(Reg n, Imm<3> imm3, Imm<2> imm2, ShiftType type, Reg m);
// thumb32 data processing (modified immediate) instructions
bool thumb32_TST_imm(Imm<1> i, Reg n, Imm<3> imm3, Imm<8> imm8);