thumb32: Implement PKHBT, PKHTB
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3 changed files with 17 additions and 1 deletions
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@ -38,7 +38,7 @@ INST(thumb32_MVN_reg, "MVN (reg)", "11101010011S11110vvvdd
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INST(thumb32_ORN_reg, "ORN (reg)", "11101010011Snnnn0vvvddddvvttmmmm")
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INST(thumb32_TEQ_reg, "TEQ (reg)", "111010101001nnnn0vvv1111vvttmmmm")
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INST(thumb32_EOR_reg, "EOR (reg)", "11101010100Snnnn0vvvddddvvttmmmm")
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//INST(thumb32_PKH, "PKH", "11101010110---------------------")
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INST(thumb32_PKH, "PKH", "111010101100nnnn0vvvddddvvt0mmmm")
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//INST(thumb32_CMN_reg, "CMN (reg)", "111010110001--------1111--------")
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//INST(thumb32_ADD_reg, "ADD (reg)", "11101011000---------------------")
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//INST(thumb32_ADC_reg, "ADC (reg)", "11101011010---------------------")
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@ -155,4 +155,19 @@ bool ThumbTranslatorVisitor::thumb32_EOR_reg(bool S, Reg n, Imm<3> imm3, Reg d,
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return true;
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}
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bool ThumbTranslatorVisitor::thumb32_PKH(Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, Imm<1> tb, Reg m) {
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const ShiftType type = concatenate(tb, Imm<1>{0}).ZeroExtend<ShiftType>();
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if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
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return UnpredictableInstruction();
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}
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const auto operand2 = EmitImmShift(ir.GetRegister(m), type, imm3, imm2, ir.GetCFlag()).result;
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const auto lower = ir.And((tb == 1) ? operand2 : ir.GetRegister(n), ir.Imm32(0x0000FFFF));
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const auto upper = ir.And((tb == 1) ? ir.GetRegister(n) : operand2, ir.Imm32(0xFFFF0000));
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const auto result = ir.Or(upper, lower);
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ir.SetRegister(d, result);
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return true;
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}
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} // namespace Dynarmic::A32
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@ -181,6 +181,7 @@ struct ThumbTranslatorVisitor final {
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bool thumb32_ORN_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m);
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bool thumb32_TEQ_reg(Reg n, Imm<3> imm3, Imm<2> imm2, ShiftType type, Reg m);
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bool thumb32_EOR_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m);
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bool thumb32_PKH(Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, Imm<1> tb, Reg m);
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// thumb32 data processing (modified immediate) instructions
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bool thumb32_TST_imm(Imm<1> i, Reg n, Imm<3> imm3, Imm<8> imm8);
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