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A64: Implement CMGE (register, scalar)

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Lioncash 2018-04-15 05:22:50 -04:00 committed by MerryMage
parent 755981d0da
commit c18b20b8d1
2 changed files with 37 additions and 14 deletions
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2
src/frontend/A64/decoder/a64.inc
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@ -446,7 +446,7 @@ INST(ADDP_pair, "ADDP (scalar)", "01011
//INST(SQADD_1, "SQADD", "01011110zz1mmmmm000011nnnnnddddd") //INST(SQADD_1, "SQADD", "01011110zz1mmmmm000011nnnnnddddd")
//INST(SQSUB_1, "SQSUB", "01011110zz1mmmmm001011nnnnnddddd") //INST(SQSUB_1, "SQSUB", "01011110zz1mmmmm001011nnnnnddddd")
INST(CMGT_reg_1, "CMGT (register)", "01011110zz1mmmmm001101nnnnnddddd") INST(CMGT_reg_1, "CMGT (register)", "01011110zz1mmmmm001101nnnnnddddd")
//INST(CMGE_reg_1, "CMGE (register)", "01011110zz1mmmmm001111nnnnnddddd") INST(CMGE_reg_1, "CMGE (register)", "01011110zz1mmmmm001111nnnnnddddd")
//INST(SSHL_1, "SSHL", "01011110zz1mmmmm010001nnnnnddddd") //INST(SSHL_1, "SSHL", "01011110zz1mmmmm010001nnnnnddddd")
//INST(SQSHL_reg_1, "SQSHL (register)", "01011110zz1mmmmm010011nnnnnddddd") //INST(SQSHL_reg_1, "SQSHL (register)", "01011110zz1mmmmm010011nnnnnddddd")
//INST(SRSHL_1, "SRSHL", "01011110zz1mmmmm010101nnnnnddddd") //INST(SRSHL_1, "SRSHL", "01011110zz1mmmmm010101nnnnnddddd")

47
src/frontend/A64/translate/impl/simd_scalar_three_same.cpp
View file

@ -8,6 +8,37 @@
#include "frontend/A64/translate/impl/impl.h" #include "frontend/A64/translate/impl/impl.h"
namespace Dynarmic::A64 { namespace Dynarmic::A64 {
namespace {
enum class ComparisonType {
GE,
GT,
};
bool ScalarCompare(TranslatorVisitor& v, Imm<2> size, Vec Vm, Vec Vn, Vec Vd, ComparisonType type) {
if (size != 0b11) {
return v.ReservedValue();
}
const size_t esize = 64;
const size_t datasize = 64;
const IR::U128 operand1 = v.V(datasize, Vn);
const IR::U128 operand2 = v.V(datasize, Vm);
const IR::U128 result = [&] {
switch (type) {
case ComparisonType::GE:
return v.ir.VectorGreaterEqualSigned(esize, operand1, operand2);
case ComparisonType::GT:
default:
return v.ir.VectorGreaterSigned(esize, operand1, operand2);
}
}();
v.V_scalar(datasize, Vd, v.ir.VectorGetElement(esize, result, 0));
return true;
}
} // Anonymous namespace
bool TranslatorVisitor::ADD_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { bool TranslatorVisitor::ADD_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
if (size != 0b11) { if (size != 0b11) {
@ -23,20 +54,12 @@ bool TranslatorVisitor::ADD_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
return true; return true;
} }
bool TranslatorVisitor::CMGT_reg_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { bool TranslatorVisitor::CMGE_reg_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
if (size != 0b11) { return ScalarCompare(*this, size, Vm, Vn, Vd, ComparisonType::GE);
return ReservedValue();
} }
const size_t esize = 8 << size.ZeroExtend(); bool TranslatorVisitor::CMGT_reg_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
const size_t datasize = 128; return ScalarCompare(*this, size, Vm, Vn, Vd, ComparisonType::GT);
const IR::U128 operand1 = V(datasize, Vn);
const IR::U128 operand2 = V(datasize, Vm);
const IR::U128 result = ir.VectorGreaterSigned(esize, operand1, operand2);
V_scalar(esize, Vd, ir.VectorGetElement(esize, result, 0));
return true;
} }
bool TranslatorVisitor::SUB_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { bool TranslatorVisitor::SUB_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {