mirrors/dynarmic
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

translate_arm/exception_generating: Invert conditionals where applicable

Browse source
This commit is contained in:
Lioncash 2019-03-01 00:22:45 -05:00 committed by MerryMage
parent d8a8d3b073
commit c2de6ecfd0
1 changed files with 18 additions and 14 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

18
src/frontend/A32/translate/translate_arm/exception_generating.cpp
View file

@ -10,33 +10,37 @@
namespace Dynarmic::A32 { namespace Dynarmic::A32 {
// BKPT #<imm16>
bool ArmTranslatorVisitor::arm_BKPT(Cond cond, Imm12 /*imm12*/, Imm4 /*imm4*/) { bool ArmTranslatorVisitor::arm_BKPT(Cond cond, Imm12 /*imm12*/, Imm4 /*imm4*/) {
if (cond != Cond::AL && !options.define_unpredictable_behaviour) { if (cond != Cond::AL && !options.define_unpredictable_behaviour) {
return UnpredictableInstruction(); return UnpredictableInstruction();
} }
// UNPREDICTABLE: The instruction executes conditionally. // UNPREDICTABLE: The instruction executes conditionally.
if (ConditionPassed(cond)) { if (!ConditionPassed(cond)) {
return true;
}
ir.ExceptionRaised(Exception::Breakpoint); ir.ExceptionRaised(Exception::Breakpoint);
ir.SetTerm(IR::Term::CheckHalt{IR::Term::ReturnToDispatch{}}); ir.SetTerm(IR::Term::CheckHalt{IR::Term::ReturnToDispatch{}});
return false; return false;
} }
// SVC<c> #<imm24>
bool ArmTranslatorVisitor::arm_SVC(Cond cond, Imm24 imm24) {
if (!ConditionPassed(cond)) {
return true; return true;
} }
bool ArmTranslatorVisitor::arm_SVC(Cond cond, Imm24 imm24) { const u32 imm32 = imm24;
u32 imm32 = imm24;
// SVC<c> #<imm24>
if (ConditionPassed(cond)) {
ir.PushRSB(ir.current_location.AdvancePC(4)); ir.PushRSB(ir.current_location.AdvancePC(4));
ir.BranchWritePC(ir.Imm32(ir.current_location.PC() + 4)); ir.BranchWritePC(ir.Imm32(ir.current_location.PC() + 4));
ir.CallSupervisor(ir.Imm32(imm32)); ir.CallSupervisor(ir.Imm32(imm32));
ir.SetTerm(IR::Term::CheckHalt{IR::Term::PopRSBHint{}}); ir.SetTerm(IR::Term::CheckHalt{IR::Term::PopRSBHint{}});
return false; return false;
} }
return true;
}
// UDF<c> #<imm16>
bool ArmTranslatorVisitor::arm_UDF() { bool ArmTranslatorVisitor::arm_UDF() {
return UndefinedInstruction(); return UndefinedInstruction();
} }