thumb32: Implement USAD8

This commit is contained in:
Lioncash 2021-02-06 18:58:54 -05:00 committed by MerryMage
parent b07fab604f
commit ed453aa52d
3 changed files with 15 additions and 1 deletions

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@ -275,7 +275,7 @@ INST(thumb32_MLS, "MLS", "111110110000nnnnaaaadd
//INST(thumb32_SMMUL, "SMMUL", "111110110101----1111----000-----") //INST(thumb32_SMMUL, "SMMUL", "111110110101----1111----000-----")
//INST(thumb32_SMMLA, "SMMLA", "111110110101------------000-----") //INST(thumb32_SMMLA, "SMMLA", "111110110101------------000-----")
//INST(thumb32_SMMLS, "SMMLS", "111110110110------------000-----") //INST(thumb32_SMMLS, "SMMLS", "111110110110------------000-----")
//INST(thumb32_USAD8, "USAD8", "111110110111----1111----0000----") INST(thumb32_USAD8, "USAD8", "111110110111nnnn1111dddd0000mmmm")
//INST(thumb32_USADA8, "USADA8", "111110110111------------0000----") //INST(thumb32_USADA8, "USADA8", "111110110111------------0000----")
// Long Multiply, Long Multiply Accumulate, and Divide // Long Multiply, Long Multiply Accumulate, and Divide

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@ -48,4 +48,17 @@ bool ThumbTranslatorVisitor::thumb32_MUL(Reg n, Reg d, Reg m) {
return true; return true;
} }
bool ThumbTranslatorVisitor::thumb32_USAD8(Reg n, Reg d, Reg m) {
if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
return UnpredictableInstruction();
}
const auto reg_m = ir.GetRegister(m);
const auto reg_n = ir.GetRegister(n);
const auto result = ir.PackedAbsDiffSumS8(reg_n, reg_m);
ir.SetRegister(d, result);
return true;
}
} // namespace Dynarmic::A32 } // namespace Dynarmic::A32

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@ -132,6 +132,7 @@ struct ThumbTranslatorVisitor final {
bool thumb32_MLA(Reg n, Reg a, Reg d, Reg m); bool thumb32_MLA(Reg n, Reg a, Reg d, Reg m);
bool thumb32_MLS(Reg n, Reg a, Reg d, Reg m); bool thumb32_MLS(Reg n, Reg a, Reg d, Reg m);
bool thumb32_MUL(Reg n, Reg d, Reg m); bool thumb32_MUL(Reg n, Reg d, Reg m);
bool thumb32_USAD8(Reg n, Reg d, Reg m);
// thumb32 parallel add/sub instructions // thumb32 parallel add/sub instructions
bool thumb32_SADD8(Reg n, Reg d, Reg m); bool thumb32_SADD8(Reg n, Reg d, Reg m);