thumb32: Implement USAD8
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3 changed files with 15 additions and 1 deletions
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@ -275,7 +275,7 @@ INST(thumb32_MLS, "MLS", "111110110000nnnnaaaadd
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//INST(thumb32_SMMUL, "SMMUL", "111110110101----1111----000-----")
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//INST(thumb32_SMMUL, "SMMUL", "111110110101----1111----000-----")
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//INST(thumb32_SMMLA, "SMMLA", "111110110101------------000-----")
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//INST(thumb32_SMMLA, "SMMLA", "111110110101------------000-----")
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//INST(thumb32_SMMLS, "SMMLS", "111110110110------------000-----")
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//INST(thumb32_SMMLS, "SMMLS", "111110110110------------000-----")
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//INST(thumb32_USAD8, "USAD8", "111110110111----1111----0000----")
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INST(thumb32_USAD8, "USAD8", "111110110111nnnn1111dddd0000mmmm")
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//INST(thumb32_USADA8, "USADA8", "111110110111------------0000----")
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//INST(thumb32_USADA8, "USADA8", "111110110111------------0000----")
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// Long Multiply, Long Multiply Accumulate, and Divide
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// Long Multiply, Long Multiply Accumulate, and Divide
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@ -48,4 +48,17 @@ bool ThumbTranslatorVisitor::thumb32_MUL(Reg n, Reg d, Reg m) {
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return true;
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return true;
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}
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}
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bool ThumbTranslatorVisitor::thumb32_USAD8(Reg n, Reg d, Reg m) {
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if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
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return UnpredictableInstruction();
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}
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const auto reg_m = ir.GetRegister(m);
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const auto reg_n = ir.GetRegister(n);
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const auto result = ir.PackedAbsDiffSumS8(reg_n, reg_m);
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ir.SetRegister(d, result);
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return true;
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}
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} // namespace Dynarmic::A32
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} // namespace Dynarmic::A32
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@ -132,6 +132,7 @@ struct ThumbTranslatorVisitor final {
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bool thumb32_MLA(Reg n, Reg a, Reg d, Reg m);
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bool thumb32_MLA(Reg n, Reg a, Reg d, Reg m);
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bool thumb32_MLS(Reg n, Reg a, Reg d, Reg m);
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bool thumb32_MLS(Reg n, Reg a, Reg d, Reg m);
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bool thumb32_MUL(Reg n, Reg d, Reg m);
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bool thumb32_MUL(Reg n, Reg d, Reg m);
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bool thumb32_USAD8(Reg n, Reg d, Reg m);
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// thumb32 parallel add/sub instructions
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// thumb32 parallel add/sub instructions
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bool thumb32_SADD8(Reg n, Reg d, Reg m);
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bool thumb32_SADD8(Reg n, Reg d, Reg m);
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