A64/system: Implement MSR/MRS for NZCV
This commit is contained in:
parent
8c09da666a
commit
f2345c1590
1 changed files with 8 additions and 0 deletions
|
@ -21,6 +21,8 @@ enum class SystemRegisterEncoding : u32 {
|
||||||
FPCR = 0b11'011'0100'0100'000,
|
FPCR = 0b11'011'0100'0100'000,
|
||||||
// Floating-point Status Register
|
// Floating-point Status Register
|
||||||
FPSR = 0b11'011'0100'0100'001,
|
FPSR = 0b11'011'0100'0100'001,
|
||||||
|
// NZCV, Condition Flags
|
||||||
|
NZCV = 0b11'011'0100'0010'000,
|
||||||
// Read/Write Software Thread ID Register
|
// Read/Write Software Thread ID Register
|
||||||
TPIDR_EL0 = 0b11'011'1101'0000'010,
|
TPIDR_EL0 = 0b11'011'1101'0000'010,
|
||||||
// Read-Only Software Thread ID Register
|
// Read-Only Software Thread ID Register
|
||||||
|
@ -103,6 +105,9 @@ bool TranslatorVisitor::MSR_reg(Imm<1> o0, Imm<3> op1, Imm<4> CRn, Imm<4> CRm, I
|
||||||
case SystemRegisterEncoding::FPSR:
|
case SystemRegisterEncoding::FPSR:
|
||||||
ir.SetFPSR(X(32, Rt));
|
ir.SetFPSR(X(32, Rt));
|
||||||
return true;
|
return true;
|
||||||
|
case SystemRegisterEncoding::NZCV:
|
||||||
|
ir.SetNZCVRaw(X(32, Rt));
|
||||||
|
return true;
|
||||||
case SystemRegisterEncoding::TPIDR_EL0:
|
case SystemRegisterEncoding::TPIDR_EL0:
|
||||||
ir.SetTPIDR(X(64, Rt));
|
ir.SetTPIDR(X(64, Rt));
|
||||||
return true;
|
return true;
|
||||||
|
@ -139,6 +144,9 @@ bool TranslatorVisitor::MRS(Imm<1> o0, Imm<3> op1, Imm<4> CRn, Imm<4> CRm, Imm<3
|
||||||
case SystemRegisterEncoding::FPSR:
|
case SystemRegisterEncoding::FPSR:
|
||||||
X(32, Rt, ir.GetFPSR());
|
X(32, Rt, ir.GetFPSR());
|
||||||
return true;
|
return true;
|
||||||
|
case SystemRegisterEncoding::NZCV:
|
||||||
|
X(32, Rt, ir.GetNZCVRaw());
|
||||||
|
return true;
|
||||||
case SystemRegisterEncoding::TPIDR_EL0:
|
case SystemRegisterEncoding::TPIDR_EL0:
|
||||||
X(64, Rt, ir.GetTPIDR());
|
X(64, Rt, ir.GetTPIDR());
|
||||||
return true;
|
return true;
|
||||||
|
|
Loading…
Reference in a new issue