A64/system: Implement MSR/MRS for NZCV
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1 changed files with 8 additions and 0 deletions
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@ -21,6 +21,8 @@ enum class SystemRegisterEncoding : u32 {
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FPCR = 0b11'011'0100'0100'000,
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// Floating-point Status Register
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FPSR = 0b11'011'0100'0100'001,
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// NZCV, Condition Flags
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NZCV = 0b11'011'0100'0010'000,
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// Read/Write Software Thread ID Register
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TPIDR_EL0 = 0b11'011'1101'0000'010,
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// Read-Only Software Thread ID Register
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@ -103,6 +105,9 @@ bool TranslatorVisitor::MSR_reg(Imm<1> o0, Imm<3> op1, Imm<4> CRn, Imm<4> CRm, I
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case SystemRegisterEncoding::FPSR:
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ir.SetFPSR(X(32, Rt));
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return true;
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case SystemRegisterEncoding::NZCV:
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ir.SetNZCVRaw(X(32, Rt));
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return true;
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case SystemRegisterEncoding::TPIDR_EL0:
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ir.SetTPIDR(X(64, Rt));
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return true;
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@ -139,6 +144,9 @@ bool TranslatorVisitor::MRS(Imm<1> o0, Imm<3> op1, Imm<4> CRn, Imm<4> CRm, Imm<3
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case SystemRegisterEncoding::FPSR:
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X(32, Rt, ir.GetFPSR());
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return true;
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case SystemRegisterEncoding::NZCV:
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X(32, Rt, ir.GetNZCVRaw());
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return true;
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case SystemRegisterEncoding::TPIDR_EL0:
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X(64, Rt, ir.GetTPIDR());
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return true;
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