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Support 64-bit immediates

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This commit is contained in:
MerryMage 2016-12-03 11:29:50 +00:00
parent ff00b8c555
commit f2fe376fc6
3 changed files with 14 additions and 7 deletions
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16
src/backend_x64/reg_alloc.cpp
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@ -16,14 +16,16 @@
namespace Dynarmic { namespace Dynarmic {
namespace BackendX64 { namespace BackendX64 {
static u32 ImmediateToU32(const IR::Value& imm) { static u64 ImmediateToU64(const IR::Value& imm) {
switch (imm.GetType()) { switch (imm.GetType()) {
case IR::Type::U1: case IR::Type::U1:
return u32(imm.GetU1()); return u64(imm.GetU1());
case IR::Type::U8: case IR::Type::U8:
return u32(imm.GetU8()); return u64(imm.GetU8());
case IR::Type::U32: case IR::Type::U32:
return u32(imm.GetU32()); return u64(imm.GetU32());
case IR::Type::U64:
return u64(imm.GetU64());
default: default:
ASSERT_MSG(false, "This should never happen."); ASSERT_MSG(false, "This should never happen.");
} }
@ -477,11 +479,11 @@ HostLoc RegAlloc::LoadImmediateIntoHostLocReg(IR::Value imm, HostLoc host_loc) {
Xbyak::Reg64 reg = HostLocToReg64(host_loc); Xbyak::Reg64 reg = HostLocToReg64(host_loc);
u32 imm_value = ImmediateToU32(imm); u64 imm_value = ImmediateToU64(imm);
if (imm_value == 0) if (imm_value == 0)
code->xor_(reg, reg); code->xor_(reg.cvt32(), reg.cvt32());
else else
code->mov(reg.cvt32(), imm_value); code->mov(reg, imm_value);
return host_loc; return host_loc;
} }

4
src/frontend/ir/ir_emitter.cpp
View file

@ -37,6 +37,10 @@ Value IREmitter::Imm32(u32 imm32) {
return Value(imm32); return Value(imm32);
} }
Value IREmitter::Imm64(u64 imm64) {
return Value(imm64);
}
Value IREmitter::GetRegister(Arm::Reg reg) { Value IREmitter::GetRegister(Arm::Reg reg) {
if (reg == Arm::Reg::PC) { if (reg == Arm::Reg::PC) {
return Imm32(PC()); return Imm32(PC());

1
src/frontend/ir/ir_emitter.h
View file

@ -56,6 +56,7 @@ public:
Value Imm1(bool value); Value Imm1(bool value);
Value Imm8(u8 value); Value Imm8(u8 value);
Value Imm32(u32 value); Value Imm32(u32 value);
Value Imm64(u64 value);
Value GetRegister(Arm::Reg source_reg); Value GetRegister(Arm::Reg source_reg);
Value GetExtendedRegister(Arm::ExtReg source_reg); Value GetExtendedRegister(Arm::ExtReg source_reg);