MerryMage
256749910f
Add AddTicks and GetTicksRemaining callbacks
2020-04-22 20:26:12 +01:00
MerryMage
80c56aa89d
Remove unnecessary use of boost::make_optional
...
Closes #119 .
2020-04-22 20:26:12 +01:00
MerryMage
639f7cfd2d
reg_alloc: Add IsLastUse optimization for UseScratch
2020-04-22 20:26:12 +01:00
MerryMage
6b122751fe
reg_alloc: Remove reliance on IR::Inst::DecrementRemainingUses
2020-04-22 20:26:12 +01:00
MerryMage
30049ca928
emit_x86: Standardize time of DefineValue call
2020-04-22 20:26:12 +01:00
MerryMage
12eaf496fd
emit_x64: Perform mask creation for packed instructions in SSE
2020-04-22 20:26:07 +01:00
MerryMage
305e4baa29
emit_x64: Eliminate conversion of GE flags
...
* We do this so that we can simplify PackedSelect.
* We also try to minimise xmm-gpr/gpr-xmm transfers in PackedSelect.
2020-04-22 20:26:07 +01:00
MerryMage
d1e0a29cd9
Implement IR instruction PackedSelect, reimplement SEL
2020-04-22 20:26:07 +01:00
MerryMage
18f11972c6
emit_x64: Remove SSSE3 implementation of PackedHalvingAddU8
...
It is much slower than the SSE2 implementation, so there's no point keeping it around.
2020-04-22 20:26:07 +01:00
MerryMage
c4b40909f7
emit_x64: Improve code emission of FPCompare{32,64}
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Replace if-chain with table lookup
2020-04-22 20:26:07 +01:00
MerryMage
814e378249
VCMP and VCMPE were the other way around
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- This was due to a misunderstanding of what the E in VCMPE means.
- The E refers to an exception being raised when a QNaN is encountered.
- Added unit tests for VCMP{E}
2020-04-22 20:26:07 +01:00
MerryMage
08f638d447
emit_x64: pmaxuw and pminuw require SSE 4.1
...
This commit is intended to close citra-emu/citra#3137 .
pmaxuw and pminuw were used to perform unsigned comparisons; we emulate
these using a signed comparison by offsetting the inputs by 0x8000 for
CPUs that do not support SSE 4.1.
2020-04-22 20:26:07 +01:00
Mat M
77fe2aeeaa
emit_x64: Amend doxygen parameters for InvalidateCacheRange() ( #116 )
2020-04-22 20:22:01 +01:00
MerryMage
19dcdde90b
block_of_code: Add vzeroupper instructions where AVX-SSE transitions may occur
2020-04-22 20:22:01 +01:00
MerryMage
60d9392b5c
block_of_code: BlockOfCode should provide cpu info
2020-04-22 20:22:01 +01:00
MerryMage
148c01e08f
interface_x64: Remove is_executing assert from HaltExecution
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In multithreaded code this can be triggered due to a race.
2017-10-14 23:35:01 +01:00
MerryMage
f6cf265bc5
block_of_code: BlockOfCode::ABI_* should be const
2017-09-29 01:35:24 +01:00
MerryMage
29471be317
Standardize location of storage-class specifiers: Place at beginning of declarations
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Justification: C99 specifies that doing otherwise is an obsolescent feature.
2017-09-29 01:23:45 +01:00
MerryMage
b992e5f8ec
Ranged cache invalidation
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* Fix clearing code block on a partial invalidation
* Remove unnecessary use of boost::variant
* Code cleanup
2017-09-11 00:11:05 +01:00
MerryMage
568b52d4ba
externals: Update Xbyak to v5.51
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Xbyak now supports multi-byte nops
2017-08-17 21:34:54 +01:00
MerryMage
1613846ab0
reg_alloc: Handle XMM registers in LoadImmediate
2017-08-16 23:11:05 +01:00
Yuri Kunde Schlesner
38eb7e0314
emit_x64: Use alternative Xbyak names for and, or, xor
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Also enabled XBYAK_NO_OP_NAMES, allowing us to stop using
-fno-operator-names.
2017-06-12 07:57:46 +01:00
MerryMage
2c9dcfa2db
backend_x64: Rename UnwindHandler to ExceptionHandler
2017-04-20 14:08:56 +01:00
MerryMage
0d47f50f57
block_of_code: Implement farcode
2017-04-19 18:58:36 +01:00
MerryMage
9ac890c62d
reg_alloc: Fix for LLVM's interpretation of the System V ABI
...
This aspect of the System V ABI is under-defined. LLVM choses a
different interpretation from GCC and ICC.
Most other compilers assume the callee is responsible zero-ing the
upper bits of the register if necessary. LLVM assumes the caller
has zero-extended the register.
This is a quick fix for this problem until zext-tracking is
implemented.
2017-04-08 22:12:37 +01:00
MerryMage
a5bb81a97c
backend_x64: Remove dispatch loop in Jit::Run
2017-04-08 10:04:53 +01:00
MerryMage
1b37420459
backend_x64: Simplify dispatcher
2017-04-08 09:35:45 +01:00
MerryMage
4c5de3905b
emit_x64: Correct mutation of immutable in FPThreeOp{32,64}
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operand (args[1]) was erroneously declared as non-scratch.
operand's value could be modified if FTZ was enabled.
2017-04-01 09:57:14 +01:00
MerryMage
05e97058c3
parallel: Add and Subtract with Exchange improvements
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* Remove asx argument from PackedHalvingSubAdd{U16,S16} IR instruction
* Implement Packed{Halving,}{AddSub,SubAdd}{U16,S16} IR instructions
* Implement SASX, SSAX, UASX, USAX
2017-03-24 15:56:24 +00:00
Lynn
fd068ed6b8
Ranged cache invalidation
2017-03-20 11:58:25 +00:00
MerryMage
d9c69ad997
constant_pool: Implement a constant pool
2017-03-19 13:08:04 +00:00
Lioncash
d85137ed65
interface_x64: Amend LLVM disassembly code
...
This would previously attempt to perform pointer arithmetic on void pointers,
which would cause compilation errors.
2017-03-07 18:32:04 +00:00
MerryMage
92a01b0cd8
Prefer ASSERT to DEBUG_ASSERT
2017-02-26 23:30:40 +00:00
MerryMage
135346eb2e
reg_alloc: Move implementations out of header
2017-02-26 23:30:39 +00:00
MerryMage
184db36caf
reg_alloc: Call DecrementRemainingUses in only one place
2017-02-26 23:30:38 +00:00
MerryMage
51fc9fec05
reg_alloc: Reorganize
2017-02-26 23:30:37 +00:00
MerryMage
cf93ab3d31
reg_alloc: Remove old register allocator interface
2017-02-26 23:12:26 +00:00
MerryMage
08a467bf9a
emit_x64: Port to new register allocator interface
2017-02-26 23:12:25 +00:00
MerryMage
f883bad2cc
reg_alloc: New register allocation interface
2017-02-26 21:37:35 +00:00
MerryMage
13ac0c234e
reg_alloc: Differentiate between ReadLock and WriteLock
2017-02-26 21:37:34 +00:00
MerryMage
6c3df057fa
reg_alloc: Remove unused functions
2017-02-26 21:37:33 +00:00
MerryMage
1ee4c07f14
reg_alloc: Reimplement ScratchHostLocReg
2017-02-26 21:37:32 +00:00
MerryMage
640faab8a7
reg_alloc: UseHostLoc is no longer necessary
2017-02-26 21:37:30 +00:00
MerryMage
9518bbe06e
reg_alloc: Reimplement UseScratchHostLocReg
2017-02-26 21:37:29 +00:00
MerryMage
e1d8238c50
reg_alloc: Stub UseOpArg
2017-02-26 21:37:27 +00:00
MerryMage
2b078152e7
reg_alloc: Reimplement UseHostLocReg
2017-02-26 21:37:26 +00:00
MerryMage
aefe550428
reg_alloc: Remove the Def concept from register allocator internals
2017-02-26 21:37:25 +00:00
MerryMage
65cccf070e
reg_alloc: Properly encapsulate HostLocInfo
2017-02-26 21:37:24 +00:00
MerryMage
469bb6253f
backend_x64: Factor EmitExclusiveWriteMemory64 into ExclusiveWrite
2017-02-26 15:34:26 +00:00
MerryMage
d7ab1f9c64
backend_x64: Fix ABI violation in ReadMemory and WriteMemory
...
Caller-save registers were not saved before call instruction.
Refer to issue #98 .
2017-02-26 15:34:25 +00:00
MerryMage
3768174783
ir_opt: Constant propagation pass works better with a DCE just before it
2017-02-26 15:28:35 +00:00
MerryMage
bbeea72eba
ir_opt: Remove redundant shift instructions
2017-02-26 15:28:14 +00:00
MerryMage
517fe0f18e
emit_x64: WriteMemory* microinstructions do not define a value
2017-02-25 11:54:47 +00:00
MerryMage
1ff60bc69f
reg_alloc: Move OpArg into own header
2017-02-21 23:38:36 +00:00
MerryMage
058f7b5de6
emit_x64: Make EmitTerminal type-safe
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Avoid the use of boost::variant::which, which tends to produce code which
is not verifiable at compile-time.
2017-02-16 19:40:51 +00:00
MerryMage
2af39dfaa8
emit_x64: Make reg_alloc a local variable
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reg_alloc contains state that is only valid on a per-block basis, so there
is no reason for it to be a member variable.
2017-02-04 09:29:35 +00:00
MerryMage
a0e9417912
ir_opt: Initial constant propagation pass implementation
2017-01-30 21:49:46 +00:00
MerryMage
2447f2f360
callbacks: Factorize memory callbacks into inner structure
2017-01-30 21:42:51 +00:00
MerryMage
9ecdd32b84
coprocessor: Implement fast-path for Coproc{Send,Get}{OneWord,TwoWords}
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Allow coprocessor interface to provide pointers instead of a callback.
This allows for a fastpath when all that is required is to read or write a
value and no other action needs to be taken.
2017-01-08 14:56:06 +00:00
MerryMage
48693eb6ff
Implement coprocessor-related microinstructions
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* CoprocInternalOperation
* CoprocSendOneWord
* CoprocSendTwoWords
* CoprocGetOneWord
* CoprocGetTwoWords
* CoprocLoadWords
* CoprocStoreWords
2017-01-08 14:56:06 +00:00
MerryMage
1efd3a764d
IR: Remove unused microinstructions NegateLowWord and NegateHighWord
2017-01-05 20:16:39 +00:00
FernandoS27
d5610eb26c
Implement UHASX, UHSAX, SHASX and SHSAX ( #75 )
2016-12-28 21:32:22 +00:00
MerryMage
c7e5216473
emit_x64: EraseInstruction now also invalidates the instruction
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There is now no longer a need to call DecrementRemainingUses on the parent
instruction.
2016-12-22 18:43:11 +00:00
Fernando Sahmkow
677f62dd6f
Implement SHSUB8 and SHSUB16 ( #74 )
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* Implement IR operations PackedHalvingSubS8 and PackedHalvingSubS16
2016-12-22 12:02:24 +00:00
MerryMage
36082087de
callbacks: Read code using MemoryReadCode callback
2016-12-21 21:39:14 +00:00
MerryMage
6a269a6ebd
IR: Add microinstructions UnsignedSaturation and SignedSaturation
2016-12-21 19:51:25 +00:00
MerryMage
02b2ab7581
emit_x64: Pass tmp to ExtractMostSignificantBitFromPackedBytes in EmitPackedAddU8
2016-12-20 22:07:51 +00:00
MerryMage
097f6a83da
emit_x64: Document ExtractAndDuplicateMostSignificantBitFromPackedWords
2016-12-20 22:06:14 +00:00
MerryMage
03f168094d
emit_x64: Document ExtractMostSignificantBitFromPackedBytes
2016-12-20 22:05:51 +00:00
FernandoS27
8919265d2c
Implement SADD8, SADD16, SSUB8, SSUB16, USUB16
2016-12-20 21:52:38 +00:00
FernandoS27
3f6ecfe245
Implemented USAD8 and USADA8
2016-12-20 21:52:38 +00:00
MerryMage
b1d3e7aae9
emit_x64: Refactor patching code
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* Only have a single std::unordered_map for patching information
* Factor patch emitters into own functions
* Implement EmitX64::Unpatch
2016-12-20 14:06:55 +00:00
MerryMage
74a95ea51e
block_of_code: Rename alloc to AllocateFromCodeSpace
2016-12-18 23:43:48 +00:00
MerryMage
96e46ba6b5
Implement QADD, QSUB, QDADD, QDSUB
2016-12-15 22:34:29 +00:00
MerryMage
276873bf70
Wrap #pragma warning with #ifdef _MSC_VER .. #endif
2016-12-15 21:36:02 +00:00
MerryMage
0e8b626d87
CMakeLists: Globally disable MSVC warning C4592
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C4592: Symbol will be dynamically initialized (implementation limitation)
2016-12-15 21:09:55 +00:00
MerryMage
91e851a991
CMakeLists: Enable /W4 on MSVC
2016-12-15 20:52:23 +00:00
MerryMage
63caed7b09
emit_x64: Remove argument names of unused arguments
2016-12-15 20:52:22 +00:00
MerryMage
5bea2e1680
block_of_code: Support stack unwinding on Windows
2016-12-12 07:49:18 +00:00
MerryMage
4962d92b79
block_of_code: Do not regenerate prelude when clearing cache
2016-12-12 07:49:18 +00:00
MerryMage
179a3388f9
block_of_code: Provide an alloc function to allocate space in the code block
2016-12-12 07:49:18 +00:00
Lioncash
f467589346
emit_x64: Remove unnecessary casts
2016-12-05 20:30:19 +00:00
Lioncash
a37631c010
emit_x64: Use reinterpret_cast for pointer casts
2016-12-05 20:30:19 +00:00
Lioncash
fafa845f64
emit_x64: Make GetBasicBlock() const qualified
2016-12-05 12:46:22 +00:00
Lioncash
6a16edc0fb
emit_x64: Move implementations into the cpp file
...
Prevents needing to rebuild everything including the emitter if any
details ever change.
2016-12-05 12:46:22 +00:00
Lioncash
282029f60a
emit_x64: Forward declare BlockOfCode
2016-12-05 12:46:22 +00:00
Lioncash
6898b74c78
emit_x64: Get rid of indirect includes
2016-12-05 12:46:22 +00:00
MerryMage
54d051977f
emit_x64: Use movdqa instead of movaps in EmitPackedSubU8
...
While movaps and movdqa are behaviourly equivalent, using movaps may incur
a domain crossing penalty on some microarchitectures. This is because
movaps is an instruction in the floating-point domain while the following
instructions are in the integer domain.
2016-12-05 01:00:51 +00:00
MerryMage
52e1445f43
Implement USUB8
2016-12-05 00:29:15 +00:00
MerryMage
5c1aab1666
Implement CLZ
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Includes tests
2016-12-04 22:56:33 +00:00
MerryMage
1a1646d962
Implement UADD8
2016-12-04 20:52:33 +00:00
MerryMage
7cad6949e7
IR: Implement new pseudo-operation GetGEFromOp
2016-12-04 20:52:06 +00:00
MerryMage
25f21b5371
emit_x64: Inline nzcv computation into EmitFPCompare32 and EmitFPCompare64
2016-12-04 11:43:31 +00:00
MerryMage
cede5e442a
emit_x64: Use xorps/xorpd when argument to TransferToFP32/TransferToFP64 is an immediate zero
2016-12-03 11:41:10 +00:00
MerryMage
e166965f3e
Implement VCMP
2016-12-03 11:41:09 +00:00
MerryMage
f2fe376fc6
Support 64-bit immediates
2016-12-03 11:29:50 +00:00
Mat M
95f34c683c
reg_alloc: Remove unnecessary breaks after returns ( #54 )
2016-12-02 19:14:44 +00:00
Mat M
de1f831d79
microinstruction: Make use_count private ( #53 )
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Makes the operation a part of the direct interface.
2016-11-30 21:51:06 +00:00
MerryMage
3621a925b2
reg_alloc: Register allocator related constraints belong with the rest of the register allocator
...
HostLocToReg64 contained two DEBUG_ASSERTs invloving constraints that
really belonged to the register allocator.
The register allocator prevents allocation of RSP and R15 because those
are reserved for the stack pointer and the state pointer respectively.
2016-11-30 19:42:41 +00:00
MerryMage
5f11b4f50e
HostLoc: R15 is a GPR
2016-11-30 18:38:03 +00:00