Commit graph

742 commits

Author SHA1 Message Date
MerryMage
445aad0639 x64/emitter: Add opBits argument to CVTSI2SS and CVTSI2SD 2016-08-23 21:58:34 +01:00
MerryMage
78464a8f01 translate_arm/vfp2: Implement VSTM (A1, A2) 2016-08-23 20:54:38 +01:00
MerryMage
a96704eb0f arm_types: new_reg >= 0 is always true since new_reg is unsigned 2016-08-23 20:11:41 +01:00
MerryMage
7a01dba3c4 arm_types: Change type signature of operator+ to size_t instead of int 2016-08-23 20:07:53 +01:00
MerryMage
af9a68f0d1 translate_arm/vfp2: Implement VLDM (A1, A2) 2016-08-23 20:07:06 +01:00
Lioncash
d5805cc6eb intrusive_list: Add size querying
Since we store pointers and have an interface for iterators
set up, the count is just the distance from the beginning
to the end of the list.

Nice thing is that because of this, basic blocks also get
the ability to have a size count without needing to do anything
directly.
2016-08-23 19:52:09 +01:00
Lioncash
2180a4be7a basic_block: Use a range-based for loop for iteration 2016-08-23 19:51:01 +01:00
Lioncash
897b776250 string_util: Use C++ attribute specifier for format strings
This is also compatible with both clang and GCC
2016-08-23 19:38:48 +01:00
Lioncash
867d345fdc disassembler: Deduplicate SignStr
Also just makes it return a character, rather than a pointer to a
string.
2016-08-23 16:40:33 +01:00
Lioncash
8bed891011 x64 emitter: Fix swapped parameter names 2016-08-23 16:39:38 +01:00
MerryMage
c8b2f63c93 get_set_elimination_pass: Eliminate unnecessary gets/sets of extended registers 2016-08-23 15:57:20 +01:00
MerryMage
e0f9dead5d microinstruction: Identity's type depends on the type of its argument 2016-08-23 15:48:30 +01:00
Lioncash
67706c208b assert: Use false in asserts rather than 0
Quiets extended warnings.
2016-08-23 14:31:54 +01:00
MerryMage
8c7a81a308 VPOP and VPUSH are floating-point load-store instructions 2016-08-23 14:26:50 +01:00
MerryMage
34cffa86a4 dead_code_elimination_pass: Update to use IR::Inst::MayHaveSideEffects 2016-08-23 13:12:14 +01:00
Lioncash
46573eb538 intrusive_list: Add insert_before() and insert_after() helper functions
Small helpers for inserting nodes before and after an existing one.
insert() is the same as insert_before(), so insert() is just made
to be an alias of this.
2016-08-23 12:38:57 +01:00
MerryMage
8d1b9f32ca Standardize indentation of switch statments 2016-08-23 12:19:27 +01:00
MerryMage
2471be317e arm_types: Implement LocationDescription::FPSCR_RMode 2016-08-23 02:22:04 +01:00
Lioncash
0ebad78432 CMakeLists: Warn when casting away cv-qualifiers from pointers
Warns whenever this type of casting isn't done via const_cast.
2016-08-22 23:24:02 +01:00
Lioncash
47f285249b microinstruction: Introduce convenience informational functions
Whenever more rigorous optimizations are attempted (or even basic ones),
it's usually helpful to know what overall kind of instruction is being
dealt with, in the event certain classes of instructions may be eligible
for optimization.
2016-08-22 21:36:48 +01:00
Lioncash
06ec4b5977 microinstruction: Make constructor explicit 2016-08-22 16:01:18 +01:00
Lioncash
fd5362e968 CMakeLists: Invert if statement
Same thing, less wordy.
2016-08-22 15:55:39 +01:00
Lioncash
723ce801c6 CMakeLists: Warn on deprecated API usages 2016-08-22 15:55:39 +01:00
Lioncash
1bedd3bd7f CMakeLists: Clean up
Moves functions out of the main CMakeLists file into module files that
can just be included whenever necessary. This also uses the CMake
provided variables for enforcing compiler requirements.
2016-08-22 15:55:39 +01:00
MerryMage
74246cc3bf tests/fuzz_arm: Randomize rounding mode in initial_fpscr 2016-08-22 15:54:22 +01:00
MerryMage
f014f3b7d4 tests/fuzz_arm: Update FPSCR in InterpreterFallback 2016-08-22 15:54:21 +01:00
MerryMage
72250b119f backend_x64/block_of_code: Add more floating point constants
* MFloatPositiveZero32
* MFloatPositiveZero64
* MFloatMinS32
* MFloatMaxS32
* MFloatMinU32
* MFloatMaxU32
2016-08-22 15:54:19 +01:00
MerryMage
a32689c832 x64/emitter: Implement CMPxxSD instructions 2016-08-22 15:54:18 +01:00
MerryMage
7a8dd9532d skyeye: Read-after-write in SMLA
In the case when RD === RN, RD was updated before AddOverflow was called
to check for an overflow, resulting in an incorrect state of the Q flag.

This is reapplying a patch from f12578b9ab
that was lost during the 20e253ece2 update
2016-08-22 15:54:17 +01:00
MerryMage
843d29b5a9 translate_arm/branch: Read-after-write in arm_BLX_reg
When BLX LR is translated, BXWritePC(GetRegister(Reg::LR)) was executed
after the SetRegister(Reg::LR, _) update was done.
2016-08-22 15:53:56 +01:00
MerryMage
d8bee60947 translate_thumb: Read-after-write in thumb16_BLX_reg
When the instruction BLX LR is translated, BXWritePC(GetRegister(Reg::LR))
was executed after the SetRegister(Reg::LR, _) update was performed.
2016-08-22 14:28:51 +01:00
MerryMage
20e253ece2 tests/skyeye_interpreter: Update Skyeye (22-08-1016)
Matches the version of Skyeye in citra commit
7b4dcacbb2006de6483e982b21956a8f3098aa1d
2016-08-22 14:07:54 +01:00
Lioncash
1abe881921 basic_block: Add proxy member functions for the instruction list
Currently basic block kind of acts like a 'dumb struct' which makes things
a little more verbose to write (as opposed to keeping it all in one place,
I guess). It's also a little wonky conceptually, considering a block is
composed of instructions (i.e. 'contains' them).

So providing accessors that make it act more like a container can make working
with algorithms a little nicer. It also makes the API a little more
defined.

Ideally, the list would be only available through a function, but
currently, the pool allocator is exposed, which seems somewhat odd,
considering the block itself should manage its overall allocations
(with placement new, and regular new), rather than putting that
sanitizing directly on the IR emitter (it should just care about emission,
not block state). However, recontaining that can be followed up with,
as it's very trivial to do.
2016-08-22 13:44:56 +01:00
Lioncash
226d66dd5b intrusive_list: satisfy the Swappable concept 2016-08-22 12:38:16 +01:00
Lioncash
2a9fdacc60 intrusive_list: move iterator implementation above list
Will make keeping non-member list functions easier to keep together with
the class.
2016-08-22 12:38:16 +01:00
Lioncash
669ffb5f3a intrusive_list: Add pop_back(), pop_front(), front(), and back() member functions 2016-08-20 21:26:16 +01:00
Lioncash
86f803da04 reg_alloc: Use Inst's HasUses() function where applicable 2016-08-20 21:26:09 +01:00
Lioncash
a8ba15f0d5 intrusive_list: Make Remove and IsEmpty stdlib compatible
Makes the name match the standard library equivalents.

C++17 introduces non-member empty() which allows for nicer handling
in generic contexts. May as well make the data structure compatible with
it.
2016-08-19 20:25:18 +01:00
Lioncash
23d190f7b0 intrusive_list: Support inserters
Allows std::inserter, std::back_inserter, and std::front_inserter to work
with intrusive lists.
2016-08-19 20:25:17 +01:00
Lioncash
36a0ad5bc2 reg_alloc: const correctness for ValueLocation() 2016-08-19 19:33:57 +01:00
MerryMage
2d6a86e43c Remove <cassert> 2016-08-19 01:53:24 +01:00
MerryMage
192a0029be ir/opcodes: Implement IR::AreTypesCompatible
Type-checking is now occuring in more than one place.
2016-08-19 01:34:14 +01:00
Tillmann Karras
9782e7da3f verification_pass: show type errors 2016-08-19 01:17:30 +01:00
Tillmann Karras
dad7724b86 TranlateArm: implement remaining multiplies
SMLALxy, SMLAxy, SMULxy SMLAWy, SMULWy, SMLAD, SMLALD, SMLSD, SMLSLD,
SMUAD, SMUSD
2016-08-19 01:08:38 +01:00
Tillmann Karras
f12578b9ab skyeye: fix read-after-write conflicts 2016-08-19 01:08:29 +01:00
MerryMage
fe15cbd50e translate_arm/parallel: Detect UNPREDICTABLE instructions 2016-08-19 00:59:07 +01:00
MerryMage
2119dfc926 translate_arm/multiply: MLA is UNPREDICTABLE when Ra == R15 2016-08-19 00:59:05 +01:00
MerryMage
0d0f4b1b4f translate_arm/load_store: Correct implementation for LDM* 2016-08-19 00:59:04 +01:00
MerryMage
4acc481463 translate_arm/load_store: Handle unpredictable instructions
This necessated handling literal versions of the instructions separately
as they had different requirements. The rationale for detecting
unpredictable instructions is because:

a. they are unlikely to be outputted by a well-behaved compiler
b. their behaviour may change between different processors

I would rather unpredictable instructions fail loudly than silently do
approximately the right thing.
2016-08-19 00:59:02 +01:00
MerryMage
5869e79b9c translate_arm: Simplify EmitImmShift and EmitRegShift 2016-08-19 00:21:31 +01:00