Commit graph

149 commits

Author SHA1 Message Date
MerryMage
5f8eb7c51c A32/location_descriptor: Add CPSR.IT to A32::LocationDescriptor 2020-04-22 21:04:22 +01:00
MerryMage
6e2cd35e4f a32_jitstate: Optimize runtime location descriptor calculation
Calculation is now one unaligned 64-bit load.
2020-04-22 21:04:22 +01:00
MerryMage
0de3993373 a32_jitstate: Remove fpsr_idc
We do not really have accurate FPSR state in any case.
2020-04-22 21:04:22 +01:00
MerryMage
6f49c0ef8e {a32,a64}_jitstate: Rename CPSR_* to cpsr_* 2020-04-22 21:04:22 +01:00
MerryMage
8cd7837839 a32_jitstate: Remove old_FPSCR 2020-04-22 21:04:22 +01:00
MerryMage
b3bb544bca a32_jitstate: Rename FPSCR_nzcv to fpsr_nzcv 2020-04-22 21:04:22 +01:00
MerryMage
76f986979d a32_jitstate: Rename FPSCR_mode to fpcr_mode 2020-04-22 21:04:22 +01:00
MerryMage
49fca15f90 {a32,a64}_jitstate: Rename FPSCR_IDC to fpsr_idc 2020-04-22 21:04:21 +01:00
MerryMage
622c02f537 {a32,a64}_jitstate: Remove FPSCR_UFC 2020-04-22 21:04:21 +01:00
MerryMage
366d63f4b4 a32_jitstate: Enable SSE FTZ and DAZ 2020-04-22 21:04:21 +01:00
MerryMage
f178562ee7 a32_jitstate: Remove exception trap enables from FPSCR_MODE_MASK
We don't currently use this for anything (we do not currently trap
floating point exceptions).

This frees these bits up for other purposes.
2020-04-22 21:04:21 +01:00
Merry
fd6222f0a1 Merge pull request #500 from lioncash/cbz
A32: Implement Thumb-1's CBZ/CBNZ instructions
2020-04-22 21:04:21 +01:00
Merry
bab4e29075 Merge pull request #498 from lioncash/ahp
A32/location_descriptor: Add AHP bit to the FPSCR mask
2020-04-22 21:04:21 +01:00
Lioncash
87083af733 general: Remove trailing spaces
General code-related cleanup. Gets rid of trailing spaces in the
codebase.
2020-04-22 21:04:21 +01:00
Lioncash
fdbafbc1ae x64/reg_alloc: Remove reference qualifier to variable in GetArgumentInfo()
The result of GetArg() is returned by value, so this is essentially
still a copy. While the previous code *is* valid, this communicates what
is actually happening a little more explicitly.
2020-04-22 21:04:20 +01:00
Lioncash
d02a4e6fc9 A32/location_descriptor: Add AHP bit to the FPSCR mask
Ensures the alternate half-precision state is preserved within the
location descriptors, which will be necessary when implementing the
half-precision extensions for VFP and NEON.
2020-04-22 21:02:47 +01:00
Lioncash
bd755ae494 frontend/ir/ir_emitter: Add A32 equivalent to A64's SetCheckBit
This will be used in a subsequent change to implement ARMv6T2's CBZ/CBNZ
Thumb-1 instructions.
2020-04-22 21:02:47 +01:00
Lioncash
c6e1fd1416 a64_emit_x64: Use const on locals where applicable
Normalizes the use of const in the source file.
2020-04-22 21:02:47 +01:00
Merry
f6f0b6da65 Merge pull request #497 from lioncash/boost
A32/coprocessor: Remove boost from public interface
2020-04-22 21:02:47 +01:00
Lioncash
fb437080be a32_emit_x64: Use const on locals where applicable
Normalizes the use of const in the source file.
2020-04-22 21:02:47 +01:00
Lioncash
5f9ba970b9 emit_x64: Use const on locals where applicable 2020-04-22 21:02:47 +01:00
Lioncash
92daae9513 A32/coprocessor: Remove boost from public interface
Removes a boost header from the public includes in favor of using the
standard-provided std::variant.

The use of boost in public interfaces is often a dealbreaker for some
people. Given we use std::optional in the header already, we can
transition over to std::variant from boost::variant.

With this removal, this makes all of our dependencies internal to the
library itself.
2020-04-22 21:02:47 +01:00
Lioncash
a40b921cb5 emit_x64: Remove unnecessary typename in GetBasicBlock()
This can be deduced from the name alone.
2020-04-22 21:02:47 +01:00
Lioncash
675f67e41d emit_x64_vector: Use const on locals where applicable
Normalizes the use of const in the source file.
2020-04-22 21:02:47 +01:00
Lioncash
cccbc7fd0e emit_x64_saturation: Use const on locals where applicable
Normalizes the use of const in the source file.
2020-04-22 21:02:47 +01:00
Lioncash
7316fa47b3 emit_x64_packed: Use const on locals where applicable
Normalizes the use of const across the source file.
2020-04-22 21:02:47 +01:00
Lioncash
3a9c2f81d0 block_of_code: Use variable template variants of type traits
Now all type traits are using the variable template variants where
applicable.
2020-04-22 21:02:47 +01:00
Lioncash
9b783a5527 emit_x64_data_processing: Use const on locals where applicable
Normalizes the use of const across the source file.
2020-04-22 21:02:47 +01:00
MerryMage
5debb411cc block_of_code: Explicitly delete copy constructor 2020-04-22 21:02:46 +01:00
MerryMage
605a43d23e Suppress MSVC warning C4702: unreachable code 2020-04-22 21:02:46 +01:00
Lioncash
8316d231e9 A32: Implement barrier instructions introduced in ARMv7
Provides basic implementations of the barrier instruction introduced
within ARMv7. Currently these simply mirror the behavior of the AArch64
equivalents.
2020-04-22 21:02:46 +01:00
Merry
09ee64ea98 Merge pull request #482 from lioncash/fixedfp
A64: Handle half-precision variants of FP->Fixed instructions
2020-04-22 21:02:45 +01:00
MerryMage
1e1e9c17c7 emit_x64_data_processing: Remove INVALID_REG
INVALID_REG.cvt8() now throws
2020-04-22 21:02:45 +01:00
Lioncash
604f39f00a frontend/ir_emitter: Add half-precision->fixed-point opcodes 2020-04-22 21:01:45 +01:00
Lioncash
96356fac93 frontend/ir_emitter: Add half-precision opcode variant of FPVectorRSqrtStepFused 2020-04-22 21:01:45 +01:00
Merry
45864133f5 Merge pull request #478 from lioncash/stepfused
A64: Handle half-precision variants of FRECPE and FRECPS
2020-04-22 21:01:44 +01:00
Lioncash
824c551ba2 frontend/ir_emitter: Add half-precision opcode variant of FPRSqrtStepFused 2020-04-22 21:01:44 +01:00
Lioncash
037acb17b9 frontend/ir_emitter: Add half-precision opcode variant for FPVectorRSqrtEstimate 2020-04-22 21:01:44 +01:00
Lioncash
5dba99b4f4 frontend/ir_emitter: Add half-precision opcode variant for FPRSqrtEstimate 2020-04-22 21:01:44 +01:00
Lioncash
825a3ea16f frontend/ir_emitter: Add half-precision opcode for FPVectorRecipEstimate 2020-04-22 21:01:44 +01:00
Lioncash
2184d24e8f frontend/ir_emitter: Add half-precision opcode for FPRecipEstimate 2020-04-22 21:01:44 +01:00
Lioncash
5d5c9f149f frontend/ir_emitter: Add half-precision opcode for FPVectorRecipStepFused 2020-04-22 21:01:44 +01:00
Lioncash
6da0411111 frontend/ir_emitter: Add half-precision opcode for FPRecipStepFused 2020-04-22 21:01:44 +01:00
Lioncash
5b4673da4b frontend/ir_emitter: Add half-precision variant of FPVectorRoundInt 2020-04-22 21:01:44 +01:00
Lioncash
ad0c698f89 frontend/ir_emitter: Add half-precision variant of FPRoundInt 2020-04-22 21:01:44 +01:00
Merry
cb9a1b18b6 Merge pull request #475 from lioncash/muladd
A64: Enable half-precision variants of floating-point multiply-add instructions
2020-04-22 21:01:44 +01:00
Merry
13f421c27d Merge pull request #473 from lioncash/sqshlu
A64: Implement SQSHLU
2020-04-22 21:01:44 +01:00
Merry
d7da53a74b Merge pull request #472 from lioncash/exception
general: Mark hash functions as noexcept
2020-04-22 21:01:44 +01:00
Lioncash
a4cadf1cd9 frontend/ir_emitter: Add opcodes for signed saturated left shifts with unsigned saturation 2020-04-22 21:01:44 +01:00
Lioncash
ec6b3ae084 ir/frontend: Add half-precision opcode for FPVectorMulAdd 2020-04-22 21:01:44 +01:00