MerryMage
18f11972c6
emit_x64: Remove SSSE3 implementation of PackedHalvingAddU8
...
It is much slower than the SSE2 implementation, so there's no point keeping it around.
2020-04-22 20:26:07 +01:00
MerryMage
c4b40909f7
emit_x64: Improve code emission of FPCompare{32,64}
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Replace if-chain with table lookup
2020-04-22 20:26:07 +01:00
MerryMage
814e378249
VCMP and VCMPE were the other way around
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- This was due to a misunderstanding of what the E in VCMPE means.
- The E refers to an exception being raised when a QNaN is encountered.
- Added unit tests for VCMP{E}
2020-04-22 20:26:07 +01:00
MerryMage
08f638d447
emit_x64: pmaxuw and pminuw require SSE 4.1
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This commit is intended to close citra-emu/citra#3137 .
pmaxuw and pminuw were used to perform unsigned comparisons; we emulate
these using a signed comparison by offsetting the inputs by 0x8000 for
CPUs that do not support SSE 4.1.
2020-04-22 20:26:07 +01:00
MerryMage
60d9392b5c
block_of_code: BlockOfCode should provide cpu info
2020-04-22 20:22:01 +01:00
MerryMage
b992e5f8ec
Ranged cache invalidation
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* Fix clearing code block on a partial invalidation
* Remove unnecessary use of boost::variant
* Code cleanup
2017-09-11 00:11:05 +01:00
Yuri Kunde Schlesner
38eb7e0314
emit_x64: Use alternative Xbyak names for and, or, xor
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Also enabled XBYAK_NO_OP_NAMES, allowing us to stop using
-fno-operator-names.
2017-06-12 07:57:46 +01:00
MerryMage
a5bb81a97c
backend_x64: Remove dispatch loop in Jit::Run
2017-04-08 10:04:53 +01:00
MerryMage
1b37420459
backend_x64: Simplify dispatcher
2017-04-08 09:35:45 +01:00
MerryMage
4c5de3905b
emit_x64: Correct mutation of immutable in FPThreeOp{32,64}
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operand (args[1]) was erroneously declared as non-scratch.
operand's value could be modified if FTZ was enabled.
2017-04-01 09:57:14 +01:00
MerryMage
05e97058c3
parallel: Add and Subtract with Exchange improvements
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* Remove asx argument from PackedHalvingSubAdd{U16,S16} IR instruction
* Implement Packed{Halving,}{AddSub,SubAdd}{U16,S16} IR instructions
* Implement SASX, SSAX, UASX, USAX
2017-03-24 15:56:24 +00:00
Lynn
fd068ed6b8
Ranged cache invalidation
2017-03-20 11:58:25 +00:00
MerryMage
d9c69ad997
constant_pool: Implement a constant pool
2017-03-19 13:08:04 +00:00
MerryMage
184db36caf
reg_alloc: Call DecrementRemainingUses in only one place
2017-02-26 23:30:38 +00:00
MerryMage
08a467bf9a
emit_x64: Port to new register allocator interface
2017-02-26 23:12:25 +00:00
MerryMage
469bb6253f
backend_x64: Factor EmitExclusiveWriteMemory64 into ExclusiveWrite
2017-02-26 15:34:26 +00:00
MerryMage
d7ab1f9c64
backend_x64: Fix ABI violation in ReadMemory and WriteMemory
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Caller-save registers were not saved before call instruction.
Refer to issue #98 .
2017-02-26 15:34:25 +00:00
MerryMage
bbeea72eba
ir_opt: Remove redundant shift instructions
2017-02-26 15:28:14 +00:00
MerryMage
517fe0f18e
emit_x64: WriteMemory* microinstructions do not define a value
2017-02-25 11:54:47 +00:00
MerryMage
058f7b5de6
emit_x64: Make EmitTerminal type-safe
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Avoid the use of boost::variant::which, which tends to produce code which
is not verifiable at compile-time.
2017-02-16 19:40:51 +00:00
MerryMage
2af39dfaa8
emit_x64: Make reg_alloc a local variable
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reg_alloc contains state that is only valid on a per-block basis, so there
is no reason for it to be a member variable.
2017-02-04 09:29:35 +00:00
MerryMage
2447f2f360
callbacks: Factorize memory callbacks into inner structure
2017-01-30 21:42:51 +00:00
MerryMage
9ecdd32b84
coprocessor: Implement fast-path for Coproc{Send,Get}{OneWord,TwoWords}
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Allow coprocessor interface to provide pointers instead of a callback.
This allows for a fastpath when all that is required is to read or write a
value and no other action needs to be taken.
2017-01-08 14:56:06 +00:00
MerryMage
48693eb6ff
Implement coprocessor-related microinstructions
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* CoprocInternalOperation
* CoprocSendOneWord
* CoprocSendTwoWords
* CoprocGetOneWord
* CoprocGetTwoWords
* CoprocLoadWords
* CoprocStoreWords
2017-01-08 14:56:06 +00:00
MerryMage
1efd3a764d
IR: Remove unused microinstructions NegateLowWord and NegateHighWord
2017-01-05 20:16:39 +00:00
FernandoS27
d5610eb26c
Implement UHASX, UHSAX, SHASX and SHSAX ( #75 )
2016-12-28 21:32:22 +00:00
MerryMage
c7e5216473
emit_x64: EraseInstruction now also invalidates the instruction
...
There is now no longer a need to call DecrementRemainingUses on the parent
instruction.
2016-12-22 18:43:11 +00:00
Fernando Sahmkow
677f62dd6f
Implement SHSUB8 and SHSUB16 ( #74 )
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* Implement IR operations PackedHalvingSubS8 and PackedHalvingSubS16
2016-12-22 12:02:24 +00:00
MerryMage
6a269a6ebd
IR: Add microinstructions UnsignedSaturation and SignedSaturation
2016-12-21 19:51:25 +00:00
MerryMage
02b2ab7581
emit_x64: Pass tmp to ExtractMostSignificantBitFromPackedBytes in EmitPackedAddU8
2016-12-20 22:07:51 +00:00
MerryMage
097f6a83da
emit_x64: Document ExtractAndDuplicateMostSignificantBitFromPackedWords
2016-12-20 22:06:14 +00:00
MerryMage
03f168094d
emit_x64: Document ExtractMostSignificantBitFromPackedBytes
2016-12-20 22:05:51 +00:00
FernandoS27
8919265d2c
Implement SADD8, SADD16, SSUB8, SSUB16, USUB16
2016-12-20 21:52:38 +00:00
FernandoS27
3f6ecfe245
Implemented USAD8 and USADA8
2016-12-20 21:52:38 +00:00
MerryMage
b1d3e7aae9
emit_x64: Refactor patching code
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* Only have a single std::unordered_map for patching information
* Factor patch emitters into own functions
* Implement EmitX64::Unpatch
2016-12-20 14:06:55 +00:00
MerryMage
96e46ba6b5
Implement QADD, QSUB, QDADD, QDSUB
2016-12-15 22:34:29 +00:00
MerryMage
63caed7b09
emit_x64: Remove argument names of unused arguments
2016-12-15 20:52:22 +00:00
Lioncash
f467589346
emit_x64: Remove unnecessary casts
2016-12-05 20:30:19 +00:00
Lioncash
a37631c010
emit_x64: Use reinterpret_cast for pointer casts
2016-12-05 20:30:19 +00:00
Lioncash
fafa845f64
emit_x64: Make GetBasicBlock() const qualified
2016-12-05 12:46:22 +00:00
Lioncash
6a16edc0fb
emit_x64: Move implementations into the cpp file
...
Prevents needing to rebuild everything including the emitter if any
details ever change.
2016-12-05 12:46:22 +00:00
Lioncash
282029f60a
emit_x64: Forward declare BlockOfCode
2016-12-05 12:46:22 +00:00
Lioncash
6898b74c78
emit_x64: Get rid of indirect includes
2016-12-05 12:46:22 +00:00
MerryMage
54d051977f
emit_x64: Use movdqa instead of movaps in EmitPackedSubU8
...
While movaps and movdqa are behaviourly equivalent, using movaps may incur
a domain crossing penalty on some microarchitectures. This is because
movaps is an instruction in the floating-point domain while the following
instructions are in the integer domain.
2016-12-05 01:00:51 +00:00
MerryMage
52e1445f43
Implement USUB8
2016-12-05 00:29:15 +00:00
MerryMage
5c1aab1666
Implement CLZ
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Includes tests
2016-12-04 22:56:33 +00:00
MerryMage
1a1646d962
Implement UADD8
2016-12-04 20:52:33 +00:00
MerryMage
7cad6949e7
IR: Implement new pseudo-operation GetGEFromOp
2016-12-04 20:52:06 +00:00
MerryMage
25f21b5371
emit_x64: Inline nzcv computation into EmitFPCompare32 and EmitFPCompare64
2016-12-04 11:43:31 +00:00
MerryMage
cede5e442a
emit_x64: Use xorps/xorpd when argument to TransferToFP32/TransferToFP64 is an immediate zero
2016-12-03 11:41:10 +00:00
MerryMage
e166965f3e
Implement VCMP
2016-12-03 11:41:09 +00:00
Mat M
de1f831d79
microinstruction: Make use_count private ( #53 )
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Makes the operation a part of the direct interface.
2016-11-30 21:51:06 +00:00
Sebastian Valle
14eb70d7e4
VFP: Fixed the VCVT behavior when converting from unsigned 32-bit values. ( #51 )
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Use a 64-bit register to hold the values so that we don't end up interpreting them as signed values.
2016-11-27 23:25:50 +00:00
Merry
0ff8c375af
Implement UHSUB8 and UHSUB16 ( #48 )
2016-11-26 18:27:21 +00:00
Merry
cb17f9a3ed
Implement SHADD8 and SHADD16 ( #47 )
2016-11-26 18:12:29 +00:00
MerryMage
c0c1bb1094
Implemented UHADD16
2016-11-26 11:28:20 +00:00
Sebastian Valle
4d44474ad4
Implemented the ARM UHADD8 instruction. ( #45 )
...
The x64 implementation uses the SSSE3 instruction PSHUFB.
A non-SSE fallback is provided in case the CPU doesn't support it.
2016-11-25 20:32:22 +00:00
MerryMage
b6f7b8babd
ir: Implement GetGEFlags, SetGEFlags
2016-11-23 19:44:27 +00:00
Mat M
6e0f27a500
types: Add helpers for determining single and doubleword extension registers ( #26 )
2016-09-07 12:08:35 +01:00
Mat M
5bc9ce544f
arm_types: Move into arm folder ( #25 )
2016-09-06 00:52:33 +01:00
MerryMage
1f61a3d7bc
jitstate: Rename fields s/guest_FPSCR/FPSCR/
2016-09-05 14:42:21 +01:00
Mat M
6d53bb6d7e
arm_types: Split out LocationDescriptor ( #20 )
...
This isn't really an ARM-specific type, since it's used to indicate a
Block location.
2016-09-05 11:54:09 +01:00
Mat M
7f9a0c3c38
Remove unnecessary explicit includes ( #16 )
2016-09-03 21:48:03 +01:00
MerryMage
4321e829d1
callbacks: Add user_arg argument to InterpreterFallback
2016-09-01 02:00:08 +01:00
MerryMage
3b5c43b427
Optimization: Read page-table directly for memory access
2016-09-01 00:58:02 +01:00
Lioncash
ea6a4e82b5
block_of_code: Make CallFunction accept function pointers only
2016-08-31 21:51:44 +01:00
Lioncash
f2bf795876
intrusive_list: Interface changes
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- Remove the root pointer from iterators.
This is unnecessary, since the only way to get a valid iterator is
either from a node itself (it transiently becomes an iterator via the
underlying interface), or through the iterator interface for the list.
This should also result in better code generation, as each increment or
decrement of an iterator is now branchless.
- Remove iterator_to
This is actually a pretty dangerous function, since it would immediately
create an iterator into the list using the given item, even if it's not
actually part of the list. This was only left around due to lack of
type handling around constructors.
- Add other overloads for erase() and remove()
Now handles iterators, pointers, and references.
2016-08-28 20:56:40 +01:00
MerryMage
7912a79fa5
emit_x64: align before emitting blocks
2016-08-27 11:04:43 +01:00
MerryMage
dca3b2f079
Implement VMRS and VMSR
2016-08-26 22:47:54 +01:00
MerryMage
814348371e
emit_x64: EmitX64::Emit: block.Location() returns by value
2016-08-26 19:43:29 +01:00
MerryMage
4f6ea715b2
emit_x64: EmitX64::Emit doesn't need descriptor argument
2016-08-26 19:14:25 +01:00
Lioncash
32c24d2cb3
Use 'false' instead of '0' in asserts
2016-08-26 18:52:08 +01:00
MerryMage
065c53ebfc
emit_x64: Make ZeroIfNaN64 branchless
2016-08-26 15:23:08 +01:00
MerryMage
656d4f7252
emit_x64: inhibit_emission is obsolete
...
Not used anymore; unused ever since intrusive lists were introduced.
2016-08-25 23:24:16 +01:00
MerryMage
4322c0907c
microinstruction: Rename FindUseWithOpcode to GetAssociatedPseudoOperation, encapsulate associated variables
2016-08-25 21:08:47 +01:00
MerryMage
922d1fd198
Merge branch 'xbyak'
2016-08-25 16:54:48 +01:00
MerryMage
e32812cd00
Port x64 backend to xbyak
2016-08-25 16:18:17 +01:00
Lioncash
0e12fb6a56
basic_block: Move all variables behind a public interface
2016-08-25 16:14:37 +01:00
MerryMage
dc26afbd7e
translate_arm: Translate more than one conditional instruction in a block
2016-08-25 13:05:33 +01:00
MerryMage
22cca5ff72
emit_x64: Actually advance RSB pointer
2016-08-24 23:19:47 +01:00
Lioncash
eba3a06d80
frontend: Introduce FPSCR register helper class
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Encapsulates all of the FPSCR state.
2016-08-24 20:51:14 +01:00
MerryMage
b5a86889cd
Implement VCVT
2016-08-23 22:20:04 +01:00
MerryMage
8d1b9f32ca
Standardize indentation of switch statments
2016-08-23 12:19:27 +01:00
Lioncash
1abe881921
basic_block: Add proxy member functions for the instruction list
...
Currently basic block kind of acts like a 'dumb struct' which makes things
a little more verbose to write (as opposed to keeping it all in one place,
I guess). It's also a little wonky conceptually, considering a block is
composed of instructions (i.e. 'contains' them).
So providing accessors that make it act more like a container can make working
with algorithms a little nicer. It also makes the API a little more
defined.
Ideally, the list would be only available through a function, but
currently, the pool allocator is exposed, which seems somewhat odd,
considering the block itself should manage its overall allocations
(with placement new, and regular new), rather than putting that
sanitizing directly on the IR emitter (it should just care about emission,
not block state). However, recontaining that can be followed up with,
as it's very trivial to do.
2016-08-22 13:44:56 +01:00
MerryMage
269160ef0d
emit_x64: Clear RSB-related caches when ClearCache() is called
2016-08-18 18:18:44 +01:00
MerryMage
1a3f3ac435
emit_x64: Correct behaviour of PackedOperation for immediate argument
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x64 MOVD_xmm does not support an immediate oparg
2016-08-18 18:17:17 +01:00
MerryMage
b2de47954b
EmitX64: Emit correct cycle count on cond failure
2016-08-18 18:16:18 +01:00
MerryMage
0ebb572e2d
Optimization: Make RSB a ring buffer instead of a stack
2016-08-15 15:48:22 +01:00
MerryMage
7d7ac0af71
Optimization: Make SVC use RSB
2016-08-15 15:02:08 +01:00
MerryMage
6c45619aa1
Optimization: Implement terminal LinkBlockFast
2016-08-15 14:33:17 +01:00
MerryMage
624e84fa09
Optimization: Tweak RSB
2016-08-15 14:08:06 +01:00
MerryMage
070298b948
Optimization: bugfix! Return Stack Buffer location hash calculation was incorrect
2016-08-15 13:21:58 +01:00
MerryMage
e164ede4dc
TranslateArm: Implement MRS, MSR (imm), MSR (reg)
2016-08-15 11:50:49 +01:00
MerryMage
d43d97b990
EmitX64/EmitPushRSB: Assert that patch location is of correct size
2016-08-13 00:52:31 +01:00
MerryMage
960d14d18e
Optimization: Implement Return Stack Buffer
2016-08-13 00:10:23 +01:00
bunnei
8e68e6fdd9
TranslateArm: Implement QADD16/QSUB16/UQADD16/UQSUB16.
2016-08-12 19:00:44 +01:00
bunnei
4b09c0d032
TranslateArm: Implement QADD8 and UQADD8.
2016-08-12 19:00:44 +01:00
bunnei
127fbe99cb
TranslateArm: Implement QSUB8.
2016-08-12 19:00:44 +01:00
bunnei
86fe29c6d2
TranslateArm: Implement UQSUB8.
2016-08-12 19:00:44 +01:00
MerryMage
1029fd27ce
Update documentation (2016-08-12)
2016-08-12 18:17:31 +01:00