The SetRegister() IR function doesn't allow specifying the PC as a
register. This is a discrepancy that slipped through (my bad). Instead,
we can use BranchWritePC(), like how the other similar PC modifying
locations do it.
Replaces type aliases of raw integral types with the more type-safe Imm
template, like how the AArch64 frontend has been using it.
This makes the two frontends more consistent with one another.
Avoids potentially dumping boost, fmt, and xbyak targets into a
top-level namespace without any qualification, which can lead to build
errors in projects that already make use of them.
Introduces the same fuzzing mechanism used by the AArch64 code for
fuzzing instruction implementations, getting rid of the need to
manually specify the instruction generator sequences--replacing it with
an instruction blacklist instead.
Much of this change originates from a previous patch made by Mary. This
just makes it interact nicely with the alterations made to get Unicorn
to cooperate properly.
Provides basic implementations of the barrier instruction introduced
within ARMv7. Currently these simply mirror the behavior of the AArch64
equivalents.
This'll reduce the amount of noise necessary in changes implementing
half-precision instructions, as the type can just be prepended to the
switch cases, instead of rewriting the whole if/else branch.
Now that we utilize C++17, we can use std::array's deduction guides to
avoid the need to explicitly specify the template arguments.
While we're at it, also use const where applicable.
Performs a similar tidying up of the Thumb translator, like what was
done with the regular ARM translator to make it consistent with the rest
of the codebase.
The A32 backend (both Thumb and ARM), will likely see more changes to it
in the near future, so this just acts as a "dusting off".
This is quite a messy interpreter and would require a large amount of
work to bring it up to speed to begin implementing newer portions of the
AArch32 instruction set into Dynarmic.
Given we already have fuzzing with Unicorn set up for
AArch64/AArch32, we can get rid of this and unify our testing
infrastructure.
This will also make building the tests much faster, given a whole
interpreter doesn't need to be built anymore as part of the project.
While skyeye was OK previously, now that we have an AArch64 backend,
this also means that we eventually have to support the AArch32
counterpart to it. Unfortunately, SkyEye is only compatible up to
ARMv6K, so we woud need to do a lot of work to bring the interpreter up
to speed with things to even begin testing new instruction
implementations.
For the AArch64 side of things, we already use Unicorn, so we can toss
out SkyEye in favor of it instead.
Now that the constructor and destructors have been placed within the cpp
file, we can forward declare the memory pool data structures. Now, a
change to the memory pool code won't ripple across the entirety of the
IR emitter.
While initially done to potentially prevent creating bugs due to C++
having a silly type-promotion mechanism involving types < sizeof(int)
and unsignedness, given that the bulk of these functions' usages
are on exit paths, these can return the correct type to avoid the need
to cast at every usage point.
Prevents potentially inlining allocation code everywhere. While we're at
it, also explicitly delete/default the copy/move constructor/assignment
operators to be explicit about them.
