2016-07-01 14:01:06 +01:00
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/* This file is part of the dynarmic project.
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* Copyright (c) 2016 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#pragma once
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2016-07-04 10:22:11 +01:00
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#include "frontend/arm_types.h"
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#include "frontend/ir/ir.h"
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#include "frontend/ir/opcodes.h"
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2016-07-01 14:01:06 +01:00
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namespace Dynarmic {
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namespace Arm {
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2016-08-12 18:17:31 +01:00
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/**
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* Convenience class to construct a basic block of the intermediate representation.
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* `block` is the resulting block.
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* The user of this class updates `current_location` as appropriate.
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*/
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2016-07-01 14:01:06 +01:00
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class IREmitter {
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public:
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2016-07-04 14:37:50 +01:00
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explicit IREmitter(LocationDescriptor descriptor) : block(descriptor), current_location(descriptor) {}
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IR::Block block;
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LocationDescriptor current_location;
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2016-07-01 14:01:06 +01:00
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struct ResultAndCarry {
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2016-07-22 23:55:00 +01:00
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IR::Value result;
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IR::Value carry;
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2016-07-01 14:01:06 +01:00
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};
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2016-07-08 10:09:18 +01:00
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struct ResultAndCarryAndOverflow {
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2016-07-22 23:55:00 +01:00
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IR::Value result;
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IR::Value carry;
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IR::Value overflow;
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2016-07-08 10:09:18 +01:00
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};
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2016-07-01 14:01:06 +01:00
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void Unimplemented();
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2016-07-11 22:43:53 +01:00
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u32 PC();
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u32 AlignPC(size_t alignment);
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2016-07-01 14:01:06 +01:00
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2016-07-22 23:55:00 +01:00
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IR::Value Imm1(bool value);
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IR::Value Imm8(u8 value);
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IR::Value Imm32(u32 value);
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IR::Value GetRegister(Reg source_reg);
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2016-08-05 18:54:19 +01:00
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IR::Value GetExtendedRegister(ExtReg source_reg);
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2016-07-22 23:55:00 +01:00
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void SetRegister(const Reg dest_reg, const IR::Value& value);
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2016-08-05 18:54:19 +01:00
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void SetExtendedRegister(const ExtReg dest_reg, const IR::Value& value);
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2016-07-22 23:55:00 +01:00
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void ALUWritePC(const IR::Value& value);
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void BranchWritePC(const IR::Value& value);
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void BXWritePC(const IR::Value& value);
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void LoadWritePC(const IR::Value& value);
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void CallSupervisor(const IR::Value& value);
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2016-08-13 00:10:23 +01:00
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void PushRSB(const LocationDescriptor& return_location);
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2016-07-22 23:55:00 +01:00
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2016-08-14 19:39:16 +01:00
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IR::Value GetCpsr();
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void SetCpsr(const IR::Value& value);
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2016-07-22 23:55:00 +01:00
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IR::Value GetCFlag();
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void SetNFlag(const IR::Value& value);
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void SetZFlag(const IR::Value& value);
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void SetCFlag(const IR::Value& value);
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void SetVFlag(const IR::Value& value);
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2016-08-06 22:04:52 +01:00
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void OrQFlag(const IR::Value& value);
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2016-07-22 23:55:00 +01:00
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2016-08-04 22:04:42 +01:00
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IR::Value Pack2x32To1x64(const IR::Value& lo, const IR::Value& hi);
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IR::Value LeastSignificantWord(const IR::Value& value);
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2016-08-06 21:03:57 +01:00
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ResultAndCarry MostSignificantWord(const IR::Value& value);
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2016-07-22 23:55:00 +01:00
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IR::Value LeastSignificantHalf(const IR::Value& value);
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IR::Value LeastSignificantByte(const IR::Value& value);
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IR::Value MostSignificantBit(const IR::Value& value);
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IR::Value IsZero(const IR::Value& value);
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2016-08-04 22:04:42 +01:00
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IR::Value IsZero64(const IR::Value& value);
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2016-07-22 23:55:00 +01:00
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ResultAndCarry LogicalShiftLeft(const IR::Value& value_in, const IR::Value& shift_amount, const IR::Value& carry_in);
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ResultAndCarry LogicalShiftRight(const IR::Value& value_in, const IR::Value& shift_amount, const IR::Value& carry_in);
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2016-08-07 14:23:33 +01:00
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IR::Value LogicalShiftRight64(const IR::Value& value_in, const IR::Value& shift_amount);
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2016-07-22 23:55:00 +01:00
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ResultAndCarry ArithmeticShiftRight(const IR::Value& value_in, const IR::Value& shift_amount, const IR::Value& carry_in);
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ResultAndCarry RotateRight(const IR::Value& value_in, const IR::Value& shift_amount, const IR::Value& carry_in);
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2016-07-31 19:07:35 +01:00
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ResultAndCarry RotateRightExtended(const IR::Value& value_in, const IR::Value& carry_in);
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2016-07-22 23:55:00 +01:00
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ResultAndCarryAndOverflow AddWithCarry(const IR::Value& a, const IR::Value& b, const IR::Value& carry_in);
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IR::Value Add(const IR::Value& a, const IR::Value& b);
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2016-08-04 22:04:42 +01:00
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IR::Value Add64(const IR::Value& a, const IR::Value& b);
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2016-07-22 23:55:00 +01:00
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ResultAndCarryAndOverflow SubWithCarry(const IR::Value& a, const IR::Value& b, const IR::Value& carry_in);
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IR::Value Sub(const IR::Value& a, const IR::Value& b);
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2016-08-06 06:09:47 +01:00
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IR::Value Sub64(const IR::Value& a, const IR::Value& b);
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2016-08-04 22:04:42 +01:00
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IR::Value Mul(const IR::Value& a, const IR::Value& b);
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IR::Value Mul64(const IR::Value& a, const IR::Value& b);
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2016-07-22 23:55:00 +01:00
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IR::Value And(const IR::Value& a, const IR::Value& b);
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IR::Value Eor(const IR::Value& a, const IR::Value& b);
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IR::Value Or(const IR::Value& a, const IR::Value& b);
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IR::Value Not(const IR::Value& a);
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2016-08-04 22:04:42 +01:00
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IR::Value SignExtendWordToLong(const IR::Value& a);
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2016-07-22 23:55:00 +01:00
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IR::Value SignExtendHalfToWord(const IR::Value& a);
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IR::Value SignExtendByteToWord(const IR::Value& a);
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2016-08-04 22:04:42 +01:00
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IR::Value ZeroExtendWordToLong(const IR::Value& a);
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2016-07-22 23:55:00 +01:00
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IR::Value ZeroExtendHalfToWord(const IR::Value& a);
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IR::Value ZeroExtendByteToWord(const IR::Value& a);
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IR::Value ByteReverseWord(const IR::Value& a);
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IR::Value ByteReverseHalf(const IR::Value& a);
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IR::Value ByteReverseDual(const IR::Value& a);
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2016-08-12 18:26:14 +01:00
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IR::Value PackedSaturatedAddU8(const IR::Value& a, const IR::Value& b);
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IR::Value PackedSaturatedAddS8(const IR::Value& a, const IR::Value& b);
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2016-08-12 16:53:16 +01:00
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IR::Value PackedSaturatedSubU8(const IR::Value& a, const IR::Value& b);
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2016-08-12 18:18:38 +01:00
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IR::Value PackedSaturatedSubS8(const IR::Value& a, const IR::Value& b);
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2016-08-12 18:42:16 +01:00
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IR::Value PackedSaturatedAddU16(const IR::Value& a, const IR::Value& b);
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IR::Value PackedSaturatedAddS16(const IR::Value& a, const IR::Value& b);
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IR::Value PackedSaturatedSubU16(const IR::Value& a, const IR::Value& b);
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IR::Value PackedSaturatedSubS16(const IR::Value& a, const IR::Value& b);
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2016-07-22 23:55:00 +01:00
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2016-08-07 19:25:12 +01:00
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IR::Value TransferToFP32(const IR::Value& a);
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IR::Value TransferToFP64(const IR::Value& a);
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IR::Value TransferFromFP32(const IR::Value& a);
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IR::Value TransferFromFP64(const IR::Value& a);
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2016-08-07 01:27:18 +01:00
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IR::Value FPAbs32(const IR::Value& a);
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IR::Value FPAbs64(const IR::Value& a);
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2016-08-06 17:21:29 +01:00
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IR::Value FPAdd32(const IR::Value& a, const IR::Value& b, bool fpscr_controlled);
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IR::Value FPAdd64(const IR::Value& a, const IR::Value& b, bool fpscr_controlled);
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2016-08-07 10:56:12 +01:00
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IR::Value FPDiv32(const IR::Value& a, const IR::Value& b, bool fpscr_controlled);
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IR::Value FPDiv64(const IR::Value& a, const IR::Value& b, bool fpscr_controlled);
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2016-08-07 10:21:14 +01:00
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IR::Value FPMul32(const IR::Value& a, const IR::Value& b, bool fpscr_controlled);
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IR::Value FPMul64(const IR::Value& a, const IR::Value& b, bool fpscr_controlled);
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2016-08-07 10:56:12 +01:00
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IR::Value FPNeg32(const IR::Value& a);
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IR::Value FPNeg64(const IR::Value& a);
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2016-08-07 12:19:07 +01:00
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IR::Value FPSqrt32(const IR::Value& a);
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IR::Value FPSqrt64(const IR::Value& a);
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2016-08-07 01:41:25 +01:00
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IR::Value FPSub32(const IR::Value& a, const IR::Value& b, bool fpscr_controlled);
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IR::Value FPSub64(const IR::Value& a, const IR::Value& b, bool fpscr_controlled);
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2016-08-06 17:21:29 +01:00
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TranslateArm: Implement CLREX, LDREX, LDREXB, LDREXD, LDREXH, STREX, STREXB, STREXD, STREXH, SWP, SWPB
2016-08-09 22:48:20 +01:00
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void ClearExlcusive();
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void SetExclusive(const IR::Value& vaddr, size_t byte_size);
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2016-07-22 23:55:00 +01:00
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IR::Value ReadMemory8(const IR::Value& vaddr);
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IR::Value ReadMemory16(const IR::Value& vaddr);
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IR::Value ReadMemory32(const IR::Value& vaddr);
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IR::Value ReadMemory64(const IR::Value& vaddr);
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void WriteMemory8(const IR::Value& vaddr, const IR::Value& value);
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void WriteMemory16(const IR::Value& vaddr, const IR::Value& value);
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void WriteMemory32(const IR::Value& vaddr, const IR::Value& value);
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void WriteMemory64(const IR::Value& vaddr, const IR::Value& value);
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TranslateArm: Implement CLREX, LDREX, LDREXB, LDREXD, LDREXH, STREX, STREXB, STREXD, STREXH, SWP, SWPB
2016-08-09 22:48:20 +01:00
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IR::Value ExclusiveWriteMemory8(const IR::Value& vaddr, const IR::Value& value);
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IR::Value ExclusiveWriteMemory16(const IR::Value& vaddr, const IR::Value& value);
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IR::Value ExclusiveWriteMemory32(const IR::Value& vaddr, const IR::Value& value);
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IR::Value ExclusiveWriteMemory64(const IR::Value& vaddr, const IR::Value& value_lo, const IR::Value& value_hi);
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2016-07-11 22:43:53 +01:00
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2016-08-05 14:07:27 +01:00
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void Breakpoint();
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2016-07-07 10:53:09 +01:00
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void SetTerm(const IR::Terminal& terminal);
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2016-07-01 14:01:06 +01:00
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private:
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2016-07-22 23:55:00 +01:00
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IR::Value Inst(IR::Opcode op, std::initializer_list<IR::Value> args);
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2016-07-01 14:01:06 +01:00
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};
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} // namespace Arm
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} // namespace Dynarmic
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