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A64: Implement UQSHL (register)'s scalar variant

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This can be implemented in terms of the vector variant.
This commit is contained in:
Lioncash 2019-03-04 14:25:22 -05:00 committed by MerryMage
parent 35ddf68ad5
commit 17aea0b997
2 changed files with 12 additions and 1 deletions
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2
src/frontend/A64/decoder/a64.inc
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@ -501,7 +501,7 @@ INST(UQSUB_1, "UQSUB", "01111
INST(CMHI_1, "CMHI (register)", "01111110zz1mmmmm001101nnnnnddddd") INST(CMHI_1, "CMHI (register)", "01111110zz1mmmmm001101nnnnnddddd")
INST(CMHS_1, "CMHS (register)", "01111110zz1mmmmm001111nnnnnddddd") INST(CMHS_1, "CMHS (register)", "01111110zz1mmmmm001111nnnnnddddd")
INST(USHL_1, "USHL", "01111110zz1mmmmm010001nnnnnddddd") INST(USHL_1, "USHL", "01111110zz1mmmmm010001nnnnnddddd")
//INST(UQSHL_reg_1, "UQSHL (register)", "01111110zz1mmmmm010011nnnnnddddd") INST(UQSHL_reg_1, "UQSHL (register)", "01111110zz1mmmmm010011nnnnnddddd")
INST(URSHL_1, "URSHL", "01111110zz1mmmmm010101nnnnnddddd") INST(URSHL_1, "URSHL", "01111110zz1mmmmm010101nnnnnddddd")
//INST(UQRSHL_1, "UQRSHL", "01111110zz1mmmmm010111nnnnnddddd") //INST(UQRSHL_1, "UQRSHL", "01111110zz1mmmmm010111nnnnnddddd")
INST(SUB_1, "SUB (vector)", "01111110zz1mmmmm100001nnnnnddddd") INST(SUB_1, "SUB (vector)", "01111110zz1mmmmm100001nnnnnddddd")

11
src/frontend/A64/translate/impl/simd_scalar_three_same.cpp
View file

@ -362,6 +362,17 @@ bool TranslatorVisitor::SUB_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
return true; return true;
} }
bool TranslatorVisitor::UQSHL_reg_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
const size_t esize = 8U << size.ZeroExtend();
const IR::U128 operand1 = ir.ZeroExtendToQuad(ir.VectorGetElement(esize, V(128, Vn), 0));
const IR::U128 operand2 = ir.ZeroExtendToQuad(ir.VectorGetElement(esize, V(128, Vm), 0));
const IR::U128 result = ir.VectorUnsignedSaturatedShiftLeft(esize, operand1, operand2);
ir.SetQ(Vd, result);
return true;
}
bool TranslatorVisitor::URSHL_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { bool TranslatorVisitor::URSHL_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
return RoundingShiftLeft(*this, size, Vm, Vn, Vd, Signedness::Unsigned); return RoundingShiftLeft(*this, size, Vm, Vn, Vd, Signedness::Unsigned);
} }