thumb32: Implement SMLAXY
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1cd10e3214
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1e06231575
3 changed files with 24 additions and 4 deletions
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@ -265,7 +265,7 @@ INST(thumb32_MUL, "MUL", "111110110000nnnn1111dd
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INST(thumb32_MLA, "MLA", "111110110000nnnnaaaadddd0000mmmm")
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INST(thumb32_MLA, "MLA", "111110110000nnnnaaaadddd0000mmmm")
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INST(thumb32_MLS, "MLS", "111110110000nnnnaaaadddd0001mmmm")
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INST(thumb32_MLS, "MLS", "111110110000nnnnaaaadddd0001mmmm")
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INST(thumb32_SMULXY, "SMULXY", "111110110001nnnn1111dddd00NMmmmm")
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INST(thumb32_SMULXY, "SMULXY", "111110110001nnnn1111dddd00NMmmmm")
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//INST(thumb32_SMLAXY, "SMLAXY", "111110110001------------00------")
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INST(thumb32_SMLAXY, "SMLAXY", "111110110001nnnnaaaadddd00NMmmmm")
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//INST(thumb32_SMUAD, "SMUAD", "111110110010----1111----000-----")
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//INST(thumb32_SMUAD, "SMUAD", "111110110010----1111----000-----")
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//INST(thumb32_SMLAD, "SMLAD", "111110110010------------000-----")
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//INST(thumb32_SMLAD, "SMLAD", "111110110010------------000-----")
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//INST(thumb32_SMULWY, "SMULWY", "111110110011----1111----000-----")
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//INST(thumb32_SMULWY, "SMULWY", "111110110011----1111----000-----")
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@ -8,7 +8,7 @@
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namespace Dynarmic::A32 {
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namespace Dynarmic::A32 {
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bool ThumbTranslatorVisitor::thumb32_MLA(Reg n, Reg a, Reg d, Reg m) {
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bool ThumbTranslatorVisitor::thumb32_MLA(Reg n, Reg a, Reg d, Reg m) {
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if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
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if (d == Reg::PC || n == Reg::PC || m == Reg::PC || a == Reg::PC) {
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return UnpredictableInstruction();
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return UnpredictableInstruction();
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}
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}
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@ -22,7 +22,7 @@ bool ThumbTranslatorVisitor::thumb32_MLA(Reg n, Reg a, Reg d, Reg m) {
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}
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}
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bool ThumbTranslatorVisitor::thumb32_MLS(Reg n, Reg a, Reg d, Reg m) {
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bool ThumbTranslatorVisitor::thumb32_MLS(Reg n, Reg a, Reg d, Reg m) {
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if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
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if (d == Reg::PC || n == Reg::PC || m == Reg::PC || a == Reg::PC) {
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return UnpredictableInstruction();
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return UnpredictableInstruction();
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}
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}
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@ -48,6 +48,25 @@ bool ThumbTranslatorVisitor::thumb32_MUL(Reg n, Reg d, Reg m) {
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return true;
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return true;
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}
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}
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bool ThumbTranslatorVisitor::thumb32_SMLAXY(Reg n, Reg a, Reg d, bool N, bool M, Reg m) {
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if (d == Reg::PC || n == Reg::PC || m == Reg::PC || a == Reg::PC) {
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return UnpredictableInstruction();
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}
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const IR::U32 n32 = ir.GetRegister(n);
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const IR::U32 m32 = ir.GetRegister(m);
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const IR::U32 n16 = N ? ir.ArithmeticShiftRight(n32, ir.Imm8(16), ir.Imm1(0)).result
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: ir.SignExtendHalfToWord(ir.LeastSignificantHalf(n32));
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const IR::U32 m16 = M ? ir.ArithmeticShiftRight(m32, ir.Imm8(16), ir.Imm1(0)).result
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: ir.SignExtendHalfToWord(ir.LeastSignificantHalf(m32));
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const IR::U32 product = ir.Mul(n16, m16);
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const auto result_overflow = ir.AddWithCarry(product, ir.GetRegister(a), ir.Imm1(0));
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ir.SetRegister(d, result_overflow.result);
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ir.OrQFlag(result_overflow.overflow);
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return true;
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}
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bool ThumbTranslatorVisitor::thumb32_SMULXY(Reg n, Reg d, bool N, bool M, Reg m) {
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bool ThumbTranslatorVisitor::thumb32_SMULXY(Reg n, Reg d, bool N, bool M, Reg m) {
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if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
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if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
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return UnpredictableInstruction();
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return UnpredictableInstruction();
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@ -79,7 +98,7 @@ bool ThumbTranslatorVisitor::thumb32_USAD8(Reg n, Reg d, Reg m) {
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}
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}
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bool ThumbTranslatorVisitor::thumb32_USADA8(Reg n, Reg a, Reg d, Reg m) {
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bool ThumbTranslatorVisitor::thumb32_USADA8(Reg n, Reg a, Reg d, Reg m) {
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if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
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if (d == Reg::PC || n == Reg::PC || m == Reg::PC || a == Reg::PC) {
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return UnpredictableInstruction();
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return UnpredictableInstruction();
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}
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}
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@ -132,6 +132,7 @@ struct ThumbTranslatorVisitor final {
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bool thumb32_MLA(Reg n, Reg a, Reg d, Reg m);
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bool thumb32_MLA(Reg n, Reg a, Reg d, Reg m);
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bool thumb32_MLS(Reg n, Reg a, Reg d, Reg m);
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bool thumb32_MLS(Reg n, Reg a, Reg d, Reg m);
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bool thumb32_MUL(Reg n, Reg d, Reg m);
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bool thumb32_MUL(Reg n, Reg d, Reg m);
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bool thumb32_SMLAXY(Reg n, Reg a, Reg d, bool N, bool M, Reg m);
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bool thumb32_SMULXY(Reg n, Reg d, bool N, bool M, Reg m);
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bool thumb32_SMULXY(Reg n, Reg d, bool N, bool M, Reg m);
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bool thumb32_USAD8(Reg n, Reg d, Reg m);
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bool thumb32_USAD8(Reg n, Reg d, Reg m);
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bool thumb32_USADA8(Reg n, Reg a, Reg d, Reg m);
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bool thumb32_USADA8(Reg n, Reg a, Reg d, Reg m);
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