MerryMage
0a77ee1a58
tests: Format to clang-format mandated style
2021-05-31 12:54:27 +01:00
merry
1672f907af
github: Add build-and-test workflow
2021-05-31 12:51:47 +01:00
Jeremy Van de woestyne
b4ee976a6f
unit tests & various fixes
2021-05-28 18:49:31 +01:00
Wunkolo
e8c266d0d3
tests/A64: Add VQADD/VQSUB unit tests
2021-05-28 14:13:11 +01:00
Wunkolo
dc7fb1f3ed
cpu_info: Add CPU Name, Family, compact output
...
Compacts and formats the output a bit to be much more
concise. Sorts CPU features by alphabetical order. Mostly
to speed up `HostFeature` testing.
2021-05-24 12:25:01 -07:00
Wunkolo
3c693f2576
emit_x64_vector: AVX512VBMI implementation of EmitVectorTableLookup128
...
Also adds AVX512VBMI detection to host_feature
2021-05-22 22:48:31 +01:00
Wunkolo
9ba5e8e52d
tests/A64: Add TBL/TBX instruction unit tests
...
Tests the TBL instruction with implementation with {1-4} register
lookups and the handling of out-of-bound indices.
Intended to target the implementation of VectorTableLookup128
2021-05-22 22:47:21 +01:00
MerryMage
53493b2024
Add .clang-format file
...
Using clang-format version 12.0.0
2021-05-22 15:07:02 +01:00
MerryMage
51b155df92
A32: Introduce PreCodeTranslationHook
2021-05-22 14:16:10 +01:00
Merry
714216fd0e
Consolidate all source files into src/ directory
2021-05-19 17:41:59 +01:00
MerryMage
d93145bd04
decoder_tests: Only run ASIMD decoder test explicitly
...
The test is a 2 minute test whose result only really matters if the ASIMD decoder is modified.
2021-05-16 21:48:25 +01:00
Wunkolo
2c0be5e18c
emit_x64_vector: AVX512 Implementation of EmitVectorNarrow{32,64}
...
Includes a new test case with the XTN instruction to verify
the implementation
2021-05-16 10:02:49 +01:00
MerryMage
b93ae62acf
thumb32: Add coprocessor instructions
2021-05-13 18:15:35 +01:00
MerryMage
62ecc2537e
print_info: Add thumb mode
2021-05-07 08:24:51 +01:00
MerryMage
61333917a4
thumb32: Implement MRS (register)
2021-05-04 12:43:38 +01:00
MerryMage
a5a210a9a5
T32: Add ASIMD instructions
2021-05-04 00:09:55 +01:00
MerryMage
d1e62b9993
T32: Add VFP instructions
2021-05-04 00:09:55 +01:00
MerryMage
cd837c5b37
A32: Merge ArmTranslateVistor and ThumbTranslateVisitor
2021-05-04 00:09:55 +01:00
MerryMage
6404f58d23
rsqrt_test: Fix on GCC
2021-05-01 20:33:14 +01:00
MerryMage
f35d98c923
fuzz_with_unicorn: Widen scope of floating point fuzzing
2021-04-26 00:26:28 +01:00
MerryMage
7bc9e36ed7
emit_x64_floating_point: Optimize 32-bit EmitFPRSqrtEstimate
2021-04-26 00:26:28 +01:00
MerryMage
e19f898aa2
ir: Reorganize to new top level folder
2021-04-21 22:22:07 +01:00
Lioncash
f5263cc196
thumb32: Implement exclusive loads
...
Implements the remaining loads for ARMv7
2021-04-19 19:46:19 +01:00
Lioncash
6241ff6be2
thumb32: Implement STREX variants
...
Implements the exclusive store instructions. Now all that remains for
ARMv7 load/stores to be done is the exclusive loads.
2021-04-10 17:15:19 +01:00
emuplz
6d4333c78e
fixed data + instruction cache callbacks (w/ tests)
2021-02-17 20:38:08 +00:00
rufi
77621a8448
implemented other ic instructions
2021-02-17 20:38:08 +00:00
emuplz
8728444af8
added support for instruction ic ivau
2021-02-17 20:38:06 +00:00
MerryMage
f77b0e2fbe
A32/thumb16: Implement IT instruction
2021-02-07 20:41:48 +00:00
MerryMage
68bd9547c5
fuzz_arm: Correctly print thumb instruction listing
2021-02-07 20:41:48 +00:00
MerryMage
a599c29d9e
testenv: Ignore warning C4309
2021-02-07 09:57:17 +00:00
MerryMage
b252636dc3
a32_unicorn: Halt when PC leaves code_mem
2021-02-06 22:15:02 +00:00
MerryMage
331a02e02e
fuzz_arm: Add fuzzing for thumb instructions
2021-02-06 21:41:01 +00:00
Lioncash
23619c8c6a
thumb32: Implement SHSUB8/UHSUB8
2021-02-01 17:50:46 -05:00
Lioncash
9d2570470e
thumb32: Implement SHADD8/UHADD8
2021-02-01 17:50:46 -05:00
Lioncash
afad76078d
thumb32: Implement SHSUB16/UHSUB16
2021-02-01 17:50:46 -05:00
Lioncash
51b7c32d02
thumb32: Implement SHSAX/UHSAX
2021-02-01 17:50:46 -05:00
Lioncash
f0a219fcd0
thumb32: Implement SHASX/UHASX
2021-02-01 17:50:46 -05:00
Lioncash
94f8efbb03
thumb32: Implement SHADD16/UHADD16
2021-02-01 17:50:46 -05:00
Lioncash
aa49b0db89
thumb32: Implement QSUB8/UQSUB8
2021-02-01 17:50:46 -05:00
Lioncash
874ab6a7b6
thumb32: Implement QADD8/UQADD8
2021-02-01 17:50:46 -05:00
Lioncash
d923fb24c6
thumb32: Implement QSUB16/UQSUB16
2021-02-01 17:50:46 -05:00
Lioncash
416fe26df0
thumb32: Implement QSAX/UQSAX
2021-02-01 17:50:14 -05:00
Lioncash
ad7c8bd042
thumb32: Implement QASX/UQASX
2021-02-01 17:31:30 -05:00
Lioncash
f52b8f924c
thumb32: Implement QADD16/UQADD16
2021-02-01 17:31:30 -05:00
Lioncash
6f593da41b
thumb32: Implement SSUB8/USUB8
2021-02-01 17:31:27 -05:00
Lioncash
271354ee95
thumb32: Implement SADD8/UADD8
2021-02-01 16:44:11 -05:00
Lioncash
8f42fd5c0e
thumb32: Implement SSUB16/USUB16
2021-02-01 16:41:02 -05:00
Lioncash
0e28c63456
thumb32: Implement SSAX/USAX
2021-02-01 16:36:18 -05:00
Lioncash
21e404d3ab
thumb32: Implement SASX/UASX
2021-02-01 16:31:25 -05:00
Lioncash
d529417875
thumb32: Implement SADD16/UADD16
2021-02-01 16:19:33 -05:00
