MerryMage
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95588d3faa
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Fix Thumb BLX (imm), BL (imm) for negative immediates
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2016-07-18 22:48:23 +01:00 |
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MerryMage
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3f11a149d7
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Implement Thumb Instructions: BLX (imm), BL (imm)
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2016-07-18 22:18:58 +01:00 |
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MerryMage
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e0d6e28b67
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Implement Thumb instructions: BX, BLX (reg), B (T1), B (T2)
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2016-07-18 21:04:39 +01:00 |
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Subv
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ccc61472b9
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Added format strings for ARM STRBT encodings A1 and A2
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2016-07-18 14:20:58 -05:00 |
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Subv
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8617bf80a1
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Added format strings for ARM LDRBT encodings A1 and A2
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2016-07-18 14:18:39 -05:00 |
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Subv
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5d5ea9325c
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Added format strings for ARM STRT encodings A1 and A2
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2016-07-18 14:05:53 -05:00 |
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MerryMage
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2363759c62
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Implement thumb STM, LDM. Fix thumb POP implementation for P=1.
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2016-07-18 20:05:35 +01:00 |
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MerryMage
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8a310777a1
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backend/EmitX64: Handle new_pc<1:0> == '10' case in BXWritePC
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2016-07-18 20:01:48 +01:00 |
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Subv
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77761ba032
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Added the format strings for LDRT encodings A1 and A2.
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2016-07-18 14:01:18 -05:00 |
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MerryMage
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14dcb18bbe
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Implemented Thumb Instructions: STR (imm, T1), STRB (imm), LDRB (imm), STR (imm, T2), LDR (imm, T2)
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2016-07-18 18:48:08 +01:00 |
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MerryMage
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a605a43ef9
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Implement Thumb Instructions: STRH (imm), LDRH (imm)
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2016-07-18 18:28:52 +01:00 |
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MerryMage
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f9755870bb
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Implement Thumb Instructions: LDR (reg), LDRH (reg), LDRSH (reg), LDRB (reg), LDRSB (reg)
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2016-07-18 18:02:02 +01:00 |
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Merry
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3b8790bf29
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Merged in Subv/dynarmic/small_opt (pull request #3)
Pass the current IR::Block by reference to the emitter.
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2016-07-18 17:38:12 +01:00 |
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MerryMage
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dfef65d98f
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Implement thumb POP instruction
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2016-07-18 17:37:48 +01:00 |
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Subv
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703a46ec99
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Pass the current IR::Block by reference to the emitter.
This avoids calling the copy constructor more times than needed.
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2016-07-18 11:27:33 -05:00 |
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MerryMage
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f7e3d7b8d2
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Implement Thumb PUSH instruction
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2016-07-18 15:11:16 +01:00 |
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MerryMage
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9109b226af
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Implement Thumb instructions: ADD (SP plus imm, T1), ADD (SP plus imm, T2), SUB (SP minus imm)
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2016-07-18 11:16:12 +01:00 |
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MerryMage
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c18a3eeab4
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Better MSVC support
* Avoiding use of templated variables.
* Now compling on MSVC with /WX (warnings as errors).
* Fixed all MSVC warnings.
* Fixed MSVC source_groups.
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2016-07-18 10:38:22 +01:00 |
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MerryMage
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bf99ddd065
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Merge branch 'master' of MerryMageBitbucket:MerryMage/dynarmic
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2016-07-18 10:33:52 +01:00 |
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MerryMage
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28a201da16
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Implement Thumb ADR instruction
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2016-07-18 09:25:33 +01:00 |
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Subv
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0cdf5fe751
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Implemented ARM REV and REVSH instructions, with tests.
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2016-07-17 14:45:42 -05:00 |
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Merry
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24aa24b1bc
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Merged in Subv/dynarmic (pull request #1)
Implemented ARM CMP (imm) instruction.
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2016-07-17 19:43:49 +01:00 |
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Subv
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7f09510945
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Implemented ARM CMP (imm) instruction.
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2016-07-17 13:29:37 -05:00 |
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MerryMage
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3720da4e19
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Implement thumb16_{SXTH,SXTB,UXTH,UXTB,REV,REV16,REVSH}
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2016-07-16 19:23:42 +01:00 |
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MerryMage
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4b1c27e64f
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Implement arm_ADC_imm
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2016-07-14 20:02:41 +01:00 |
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MerryMage
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63242924fc
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Implement thumb16_SVC
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2016-07-14 15:01:30 +01:00 |
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MerryMage
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181f78f36e
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Common: Remove src/common/logging/log.*
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2016-07-14 14:55:08 +01:00 |
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MerryMage
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07eaf100ba
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Reorganise src/frontend: Add subdirectories disassembler and translate
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2016-07-14 14:39:43 +01:00 |
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MerryMage
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9b2aff166a
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Implement arm_SVC
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2016-07-14 14:29:46 +01:00 |
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MerryMage
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672ffb93d0
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frontend/translator: Skeleton for Arm translator
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2016-07-14 13:28:20 +01:00 |
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MerryMage
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7d7751c157
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Allow IR blocks to require a cond for block entry.
* IR: Add cond, cond_failed.
* backend_x64/EmitX64: Implement EmitCondPrelude
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2016-07-14 12:52:53 +01:00 |
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MerryMage
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4ab4ca58f9
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backend_x64/EmitX64: Improve emitted code for non-carry ArithmeticShiftRight
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2016-07-14 09:02:27 +01:00 |
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MerryMage
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08e848044d
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backend_x64: Inline Routines::GenReturnFromRunCode into emitted code
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2016-07-12 16:46:27 +01:00 |
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MerryMage
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619b451902
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clang support
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2016-07-12 14:31:43 +01:00 |
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MerryMage
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8449deb0bc
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MSVC support
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2016-07-12 13:28:09 +01:00 |
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MerryMage
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44352680c6
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s/thumb1/thumb16/g: Thumb16 refers to 16-bit thumb instructions, and Thumb32 to 32-bit ones
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2016-07-12 11:09:34 +01:00 |
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MerryMage
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6e46e7899a
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Translate/Thumb: Fallback to interpreter for Thumb32 instructions
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2016-07-12 11:02:45 +01:00 |
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MerryMage
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09420d190b
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IR: Implement IR microinstructions ALUWritePC and LoadWritePC
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2016-07-12 10:58:14 +01:00 |
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MerryMage
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f85b86486b
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frontend/TranslateArm: Just interpret all ARM instructions
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2016-07-12 09:11:35 +01:00 |
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MerryMage
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1410221b47
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Implement thumb1_STR_reg, thumb1_STRH_reg, thumb1_STRB_reg
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2016-07-11 23:11:05 +01:00 |
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MerryMage
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e7922e4fef
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Implement thumb1_LDR_literal, thumb1_LDR_imm_t1
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2016-07-11 22:43:53 +01:00 |
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MerryMage
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cbcf61a9e6
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backend_x64/RegAlloc: Provide convenience function HostCall to save registers necessary as per host ABI
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2016-07-11 15:28:10 +01:00 |
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MerryMage
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f0f14fa5e8
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Implement thumb1_MOV_reg
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2016-07-10 13:10:06 +08:00 |
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MerryMage
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8920ce79b9
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Implement thumb_CMP_reg_t2
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2016-07-10 12:23:16 +08:00 |
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MerryMage
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ac2fb6b925
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Implement thumb1_MVN_reg
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2016-07-10 10:49:01 +08:00 |
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MerryMage
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d11df9067d
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Implement thumb1_BIC_reg
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2016-07-10 10:44:45 +08:00 |
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MerryMage
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98a64a92b1
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Implement thumb1_ORR_reg
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2016-07-10 09:06:38 +08:00 |
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MerryMage
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3fe46d2c6f
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Implement thumb1_CMN_reg
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2016-07-10 08:55:56 +08:00 |
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MerryMage
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641dbf8eb4
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Implement thumb1_CMP_reg
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2016-07-10 08:52:28 +08:00 |
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MerryMage
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46408267c3
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Implement thumb1_RSB_imm
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2016-07-10 08:44:07 +08:00 |
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MerryMage
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6536ad9618
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Implement thumb1_TST_reg
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2016-07-10 08:35:58 +08:00 |
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MerryMage
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8145b33882
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Implemented thumb1_ROR_reg
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2016-07-10 08:18:17 +08:00 |
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MerryMage
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207cb74dc9
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Implement thumb1_SBC_reg
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2016-07-09 08:27:41 +08:00 |
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MerryMage
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1953e44532
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Implement thumb1_ADC_reg
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2016-07-08 22:17:39 +08:00 |
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MerryMage
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9e9fa62d5f
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Implement thumb1_SUB_imm_t2
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2016-07-08 21:48:55 +08:00 |
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MerryMage
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8c587df8ce
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Implement thumb1_ADD_imm_t2
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2016-07-08 21:38:43 +08:00 |
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MerryMage
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aa72323823
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Implement thumb1_CMP_imm
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2016-07-08 21:32:01 +08:00 |
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MerryMage
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98f300144b
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Implement thumb1_MOV_imm
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2016-07-08 21:27:27 +08:00 |
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MerryMage
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34be20e4d6
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Implement thumb1_SUB_imm
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2016-07-08 20:57:53 +08:00 |
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MerryMage
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a2e40eb922
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Implement thumb1_ADD_imm
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2016-07-08 19:15:30 +08:00 |
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MerryMage
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92142d5a22
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Implement thumb1_SUB_reg
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2016-07-08 18:49:30 +08:00 |
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MerryMage
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df0c324923
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Implement thumb1_EOR_reg
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2016-07-08 18:14:54 +08:00 |
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MerryMage
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8a0511d297
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Implement thumb1_AND_reg
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2016-07-08 17:44:53 +08:00 |
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MerryMage
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5b56fd12aa
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Fix bug: Correct disassembly of thumb1_LSL_reg, thumb1_LSR_reg, thumb1_ASR_reg
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2016-07-08 17:44:52 +08:00 |
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MerryMage
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d0b48bfb59
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Implement thumb1_ADD_reg_t1 and thumb1_ADD_reg_t2
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2016-07-08 17:44:51 +08:00 |
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MerryMage
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e93fb0ba2b
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EmitX64: remove emit_fns map, use a switch statement instead
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2016-07-08 15:28:56 +08:00 |
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MerryMage
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421ab344ad
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EmitX64::EmitTerminalInterpret: Restore RSP before CALL
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2016-07-07 22:03:45 +08:00 |
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MerryMage
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e5f6450a24
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Start implementing Thumb disassembler
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2016-07-07 21:51:47 +08:00 |
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MerryMage
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f31b530703
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Fuzz thumb instructions
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2016-07-07 19:01:47 +08:00 |
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MerryMage
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5711e62419
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Implement terminal instructions
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2016-07-07 17:53:09 +08:00 |
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MerryMage
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14388ea690
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Proper implementation of Arm::Translate
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2016-07-04 21:37:50 +08:00 |
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MerryMage
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d743adf518
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Reorganisation, Import Skyeye, This is a mess
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2016-07-04 17:22:11 +08:00 |
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MerryMage
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be1c1de552
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Common: Add scope_exit.h
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2016-07-04 14:56:41 +08:00 |
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MerryMage
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6a37072865
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Tidy up CMakeLists.txt
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2016-07-01 21:23:39 +08:00 |
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MerryMage
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2be0639308
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Removed daggen
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2016-07-01 21:23:22 +08:00 |
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MerryMage
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65df15633d
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First Commit
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2016-07-01 21:01:06 +08:00 |
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