FernandoS27
3f6ecfe245
Implemented USAD8 and USADA8
2016-12-20 21:52:38 +00:00
MerryMage
96e46ba6b5
Implement QADD, QSUB, QDADD, QDSUB
2016-12-15 22:34:29 +00:00
MerryMage
52e1445f43
Implement USUB8
2016-12-05 00:29:15 +00:00
MerryMage
5c1aab1666
Implement CLZ
...
Includes tests
2016-12-04 22:56:33 +00:00
MerryMage
1a1646d962
Implement UADD8
2016-12-04 20:52:33 +00:00
MerryMage
7cad6949e7
IR: Implement new pseudo-operation GetGEFromOp
2016-12-04 20:52:06 +00:00
MerryMage
e166965f3e
Implement VCMP
2016-12-03 11:41:09 +00:00
MerryMage
f2fe376fc6
Support 64-bit immediates
2016-12-03 11:29:50 +00:00
Mat M
de1f831d79
microinstruction: Make use_count private ( #53 )
...
Makes the operation a part of the direct interface.
2016-11-30 21:51:06 +00:00
Merry
0ff8c375af
Implement UHSUB8 and UHSUB16 ( #48 )
2016-11-26 18:27:21 +00:00
Merry
cb17f9a3ed
Implement SHADD8 and SHADD16 ( #47 )
2016-11-26 18:12:29 +00:00
MerryMage
c0c1bb1094
Implemented UHADD16
2016-11-26 11:28:20 +00:00
Yuri Kunde Schlesner
9ec51f74bd
libfmt: Update version to current master
2016-11-25 20:47:04 +00:00
Sebastian Valle
4d44474ad4
Implemented the ARM UHADD8 instruction. ( #45 )
...
The x64 implementation uses the SSSE3 instruction PSHUFB.
A non-SSE fallback is provided in case the CPU doesn't support it.
2016-11-25 20:32:22 +00:00
MerryMage
b6f7b8babd
ir: Implement GetGEFlags, SetGEFlags
2016-11-23 19:44:27 +00:00
Mat M
6a2174ebfa
Add missing explicit specifiers ( #27 )
2016-09-07 12:08:48 +01:00
Mat M
6e0f27a500
types: Add helpers for determining single and doubleword extension registers ( #26 )
2016-09-07 12:08:35 +01:00
Mat M
5bc9ce544f
arm_types: Move into arm folder ( #25 )
2016-09-06 00:52:33 +01:00
Mat M
b40d19c3b7
location_descriptor: Provide operator<< string overload ( #24 )
2016-09-05 21:31:25 +01:00
Mat M
6d53bb6d7e
arm_types: Split out LocationDescriptor ( #20 )
...
This isn't really an ARM-specific type, since it's used to indicate a
Block location.
2016-09-05 11:54:09 +01:00
Mat M
84336cf29d
value: Change Value into a class ( #19 )
...
'struct' is a little bit of a misnomer, considering it has invariants
2016-09-05 11:53:56 +01:00
Mat M
858796a029
Eliminate variable shadowing warnings with MSVC ( #17 )
2016-09-04 11:30:57 +01:00
Mat M
7f9a0c3c38
Remove unnecessary explicit includes ( #16 )
2016-09-03 21:48:03 +01:00
Mat M
a465b2ddbc
ir_emitter: Fix typo. ClearExlcusive -> ClearExclusive ( #5 )
2016-09-02 12:17:22 +01:00
MerryMage
dca3b2f079
Implement VMRS and VMSR
2016-08-26 22:47:54 +01:00
Lioncash
0102951bdd
Convert formatting over to fmtlib
2016-08-26 13:13:19 +01:00
MerryMage
4322c0907c
microinstruction: Rename FindUseWithOpcode to GetAssociatedPseudoOperation, encapsulate associated variables
2016-08-25 21:08:47 +01:00
MerryMage
30df51c2dc
ir_emitter: Should be in the IR namespace, not the Arm namespace
2016-08-25 17:36:42 +01:00
Lioncash
0e12fb6a56
basic_block: Move all variables behind a public interface
2016-08-25 16:14:37 +01:00
MerryMage
dc26afbd7e
translate_arm: Translate more than one conditional instruction in a block
2016-08-25 13:05:33 +01:00
MerryMage
aa9b63bac4
basic_block: DumpBlock now dumps terminal details
2016-08-25 13:01:32 +01:00
Lioncash
eba3a06d80
frontend: Introduce FPSCR register helper class
...
Encapsulates all of the FPSCR state.
2016-08-24 20:51:14 +01:00
MerryMage
b5a86889cd
Implement VCVT
2016-08-23 22:20:04 +01:00
Lioncash
d5805cc6eb
intrusive_list: Add size querying
...
Since we store pointers and have an interface for iterators
set up, the count is just the distance from the beginning
to the end of the list.
Nice thing is that because of this, basic blocks also get
the ability to have a size count without needing to do anything
directly.
2016-08-23 19:52:09 +01:00
Lioncash
2180a4be7a
basic_block: Use a range-based for loop for iteration
2016-08-23 19:51:01 +01:00
MerryMage
e0f9dead5d
microinstruction: Identity's type depends on the type of its argument
2016-08-23 15:48:30 +01:00
MerryMage
8d1b9f32ca
Standardize indentation of switch statments
2016-08-23 12:19:27 +01:00
Lioncash
47f285249b
microinstruction: Introduce convenience informational functions
...
Whenever more rigorous optimizations are attempted (or even basic ones),
it's usually helpful to know what overall kind of instruction is being
dealt with, in the event certain classes of instructions may be eligible
for optimization.
2016-08-22 21:36:48 +01:00
Lioncash
06ec4b5977
microinstruction: Make constructor explicit
2016-08-22 16:01:18 +01:00
Lioncash
1abe881921
basic_block: Add proxy member functions for the instruction list
...
Currently basic block kind of acts like a 'dumb struct' which makes things
a little more verbose to write (as opposed to keeping it all in one place,
I guess). It's also a little wonky conceptually, considering a block is
composed of instructions (i.e. 'contains' them).
So providing accessors that make it act more like a container can make working
with algorithms a little nicer. It also makes the API a little more
defined.
Ideally, the list would be only available through a function, but
currently, the pool allocator is exposed, which seems somewhat odd,
considering the block itself should manage its overall allocations
(with placement new, and regular new), rather than putting that
sanitizing directly on the IR emitter (it should just care about emission,
not block state). However, recontaining that can be followed up with,
as it's very trivial to do.
2016-08-22 13:44:56 +01:00
Lioncash
23d190f7b0
intrusive_list: Support inserters
...
Allows std::inserter, std::back_inserter, and std::front_inserter to work
with intrusive lists.
2016-08-19 20:25:17 +01:00
MerryMage
192a0029be
ir/opcodes: Implement IR::AreTypesCompatible
...
Type-checking is now occuring in more than one place.
2016-08-19 01:34:14 +01:00
Tillmann Karras
9782e7da3f
verification_pass: show type errors
2016-08-19 01:17:30 +01:00
Lioncash
841098a0bc
ir: separate components out a little more
2016-08-17 20:46:21 +01:00
MerryMage
7d7ac0af71
Optimization: Make SVC use RSB
2016-08-15 15:02:08 +01:00
MerryMage
e164ede4dc
TranslateArm: Implement MRS, MSR (imm), MSR (reg)
2016-08-15 11:50:49 +01:00
MerryMage
960d14d18e
Optimization: Implement Return Stack Buffer
2016-08-13 00:10:23 +01:00
bunnei
8e68e6fdd9
TranslateArm: Implement QADD16/QSUB16/UQADD16/UQSUB16.
2016-08-12 19:00:44 +01:00
bunnei
4b09c0d032
TranslateArm: Implement QADD8 and UQADD8.
2016-08-12 19:00:44 +01:00
bunnei
127fbe99cb
TranslateArm: Implement QSUB8.
2016-08-12 19:00:44 +01:00
