Merry
cd2bee17f2
tests/A32: Add a SVC call test
2022-12-29 20:20:26 +00:00
Merry
038b728797
emit_x64_data_processing: Detect overflow on division
2022-11-29 14:15:12 +00:00
Merry
7dbd87ba2d
backend/arm64/a32_address_space: Terminate early if halted prior to execution beginning
2022-11-08 21:40:45 +00:00
Merry
d2deb496da
tests/A32: Add coprocessor tests
2022-10-18 15:04:30 +01:00
merry
3cb939e70b
fuzz_arm: Avoid backwards jumps that may jump into code
2022-08-08 21:05:00 +01:00
Merry
da2b1c5724
a32_get_set_elimination_pass: Convert NZ to NZC
2022-07-20 16:45:14 +01:00
Merry
6f106602ba
a32_get_set_elimination_pass: Add option to disable NZC -> NZ conversion
2022-07-20 16:42:39 +01:00
Merry
cf08130f2c
A32: Condense flag handling
...
Remove individual flag handlers, and handle them in chuks where able, to produce more optimal code.
2022-07-19 22:05:13 +01:00
Merry
e9b550de3a
fuzz_arm: Correct unicorn overrun recovery code
2022-07-14 12:30:53 +01:00
Merry
d40557b751
A32/A64: Allow std::nullopt from MemoryReadCode
...
Raise a fault at runtime if this block is executed
2022-06-21 21:41:27 +01:00
Merry
78b4ba10c9
Migrate to mcl
2022-04-19 18:05:04 +01:00
merry
7b69c87ffc
fuzz_arm: Add offset thumb instruction test
...
Test thumb instructions when (PC % 4) == 2
2022-03-20 21:05:55 +00:00
merry
dc3e70c552
fuzz_arm: Sometimes we have to step more to sync up with unicorn
...
This happens if unicorn happens to jump back on an IT instruction.
2022-02-27 19:51:09 +00:00
Merry
c4087d68bc
fuzz_arm: Don't generate thumb32_MSR_reg: Unicorn steps by 2 instead of 4
2022-02-15 15:13:41 +00:00
Merry
88906b642c
fuzz_arm: Handle unicorn overrun on internal jump
2022-02-15 14:11:02 +00:00
merry
76ec1afdad
fuzz_arm: Ensure that FPSCR.QC is tested
2022-02-12 22:07:26 +00:00
merry
473bbd422e
test_arm_instructions: Add vmsr/vcmp/vmrs test
2022-02-12 21:43:05 +00:00
Morph
28714ee75a
general: Rename files with duplicate names
...
In MSVC, having files with identical filenames will result into massive slowdowns when compiling.
The approach I have taken to resolve this is renaming the identically named files in frontend/(A32, A64) to (a32, a64)_filename.cpp/h
2021-12-23 11:38:58 +00:00
Merry
2bc86209bd
catch: Correct include directory
2021-08-08 12:52:55 +01:00
Merry
59fb568b27
tests: Use Zydis for disassembly
2021-08-06 15:29:43 +01:00
MerryMage
0a77ee1a58
tests: Format to clang-format mandated style
2021-05-31 12:54:27 +01:00
Jeremy Van de woestyne
b4ee976a6f
unit tests & various fixes
2021-05-28 18:49:31 +01:00
MerryMage
53493b2024
Add .clang-format file
...
Using clang-format version 12.0.0
2021-05-22 15:07:02 +01:00
MerryMage
51b155df92
A32: Introduce PreCodeTranslationHook
2021-05-22 14:16:10 +01:00
Merry
714216fd0e
Consolidate all source files into src/ directory
2021-05-19 17:41:59 +01:00
MerryMage
b93ae62acf
thumb32: Add coprocessor instructions
2021-05-13 18:15:35 +01:00
MerryMage
61333917a4
thumb32: Implement MRS (register)
2021-05-04 12:43:38 +01:00
MerryMage
a5a210a9a5
T32: Add ASIMD instructions
2021-05-04 00:09:55 +01:00
MerryMage
d1e62b9993
T32: Add VFP instructions
2021-05-04 00:09:55 +01:00
MerryMage
e19f898aa2
ir: Reorganize to new top level folder
2021-04-21 22:22:07 +01:00
Lioncash
f5263cc196
thumb32: Implement exclusive loads
...
Implements the remaining loads for ARMv7
2021-04-19 19:46:19 +01:00
Lioncash
6241ff6be2
thumb32: Implement STREX variants
...
Implements the exclusive store instructions. Now all that remains for
ARMv7 load/stores to be done is the exclusive loads.
2021-04-10 17:15:19 +01:00
MerryMage
f77b0e2fbe
A32/thumb16: Implement IT instruction
2021-02-07 20:41:48 +00:00
MerryMage
68bd9547c5
fuzz_arm: Correctly print thumb instruction listing
2021-02-07 20:41:48 +00:00
MerryMage
a599c29d9e
testenv: Ignore warning C4309
2021-02-07 09:57:17 +00:00
MerryMage
b252636dc3
a32_unicorn: Halt when PC leaves code_mem
2021-02-06 22:15:02 +00:00
MerryMage
331a02e02e
fuzz_arm: Add fuzzing for thumb instructions
2021-02-06 21:41:01 +00:00
Lioncash
23619c8c6a
thumb32: Implement SHSUB8/UHSUB8
2021-02-01 17:50:46 -05:00
Lioncash
9d2570470e
thumb32: Implement SHADD8/UHADD8
2021-02-01 17:50:46 -05:00
Lioncash
afad76078d
thumb32: Implement SHSUB16/UHSUB16
2021-02-01 17:50:46 -05:00
Lioncash
51b7c32d02
thumb32: Implement SHSAX/UHSAX
2021-02-01 17:50:46 -05:00
Lioncash
f0a219fcd0
thumb32: Implement SHASX/UHASX
2021-02-01 17:50:46 -05:00
Lioncash
94f8efbb03
thumb32: Implement SHADD16/UHADD16
2021-02-01 17:50:46 -05:00
Lioncash
aa49b0db89
thumb32: Implement QSUB8/UQSUB8
2021-02-01 17:50:46 -05:00
Lioncash
874ab6a7b6
thumb32: Implement QADD8/UQADD8
2021-02-01 17:50:46 -05:00
Lioncash
d923fb24c6
thumb32: Implement QSUB16/UQSUB16
2021-02-01 17:50:46 -05:00
Lioncash
416fe26df0
thumb32: Implement QSAX/UQSAX
2021-02-01 17:50:14 -05:00
Lioncash
ad7c8bd042
thumb32: Implement QASX/UQASX
2021-02-01 17:31:30 -05:00
Lioncash
f52b8f924c
thumb32: Implement QADD16/UQADD16
2021-02-01 17:31:30 -05:00
Lioncash
6f593da41b
thumb32: Implement SSUB8/USUB8
2021-02-01 17:31:27 -05:00
