MerryMage
da261772ea
emit_x64_vector_floating_point: AVX implementation of FPVector{Max,Min}
2020-04-22 20:46:22 +01:00
MerryMage
a0d6f0de57
emit_x64_vector_floating_point: Remove unnecessary double jump in HandleNaNs
2020-04-22 20:46:22 +01:00
MerryMage
7b03da86c2
IR: Implement FPVector{Max,Min}
2020-04-22 20:46:22 +01:00
MerryMage
901bd9b4e2
IR: Implement FPRecipStepFused, FPVectorRecipStepFused
2020-04-22 20:46:22 +01:00
MerryMage
939f5f5c7a
IR: Implement FPVectorRecipEstimate
2020-04-22 20:46:22 +01:00
MerryMage
c1dcfe29f7
IR: Implement FPRecipEstimate
2020-04-22 20:46:22 +01:00
MerryMage
3fe45c6d8e
block_of_code: Add ABI_PARAMS array
2020-04-22 20:46:22 +01:00
MerryMage
64c2f698a2
emit_x64_vector_floating_point: Specify NanHandler::function_type explicitly
...
MSVC doesn't like dealing with auto return types
2020-04-22 20:46:22 +01:00
MerryMage
2ef59b4f03
emit_x64_vector_floating_point: ChooseOnFsize arguments maybe_unused
2020-04-22 20:46:22 +01:00
MerryMage
04f325a05e
IR: Implement FPVectorNeg
2020-04-22 20:46:22 +01:00
MerryMage
771a4fc20b
IR: Implement FPVectorMulAdd
2020-04-22 20:46:22 +01:00
MerryMage
3218bb9890
emit_x64_vector_floating_point: Standardize naming scheme
2020-04-22 20:46:22 +01:00
MerryMage
8f72be0a02
emit_x64_floating_point: Simplify indexers
2020-04-22 20:46:22 +01:00
MerryMage
25b28bb234
emit_x64_vector_floating_point: Simplify EmitVectorOperation*
2020-04-22 20:46:22 +01:00
MerryMage
1edd0125b2
mp: rename mp.h to mp/function_info.h
2020-04-22 20:46:22 +01:00
MerryMage
0921678edb
emit_x64_vector: Slightly improve ArithmeticShiftRightByte
2020-04-22 20:46:22 +01:00
MerryMage
43407c4bb4
emit_x64_vector: Simplify VectorShuffleImpl
2020-04-22 20:46:22 +01:00
MerryMage
ecbf9dbae5
IR: Implement A64OrQC
2020-04-22 20:46:22 +01:00
MerryMage
8f4c1a8558
emit_x64_vector: -0x80000000 isn't -0x80000000
2020-04-22 20:46:22 +01:00
MerryMage
b455b566e7
A64: Implement UQXTN (vector)
2020-04-22 20:46:22 +01:00
MerryMage
e686a81612
emit_x64_vector: Fix non-SSE4.1 saturated narrowing reconstruction comparison
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Allows non-SSE4.1 to produce the correct FPSR.QC flag
2020-04-22 20:46:22 +01:00
MerryMage
3874cb37e3
A64: Implement SQXTN (vector)
2020-04-22 20:46:22 +01:00
MerryMage
8ef114d48f
emit_x64_vector: packusdw reqiures SSE4.1
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In EmitVectorSignedSaturatedNarrowToUnsigned32.
2020-04-22 20:46:22 +01:00
MerryMage
f020dbe4ed
A64: Implement SQXTUN
2020-04-22 20:46:22 +01:00
MerryMage
b2e4c16ef8
A64: Implement FRSQRTS (vector), single/double variant
2020-04-22 20:46:22 +01:00
MerryMage
45dc5f74f3
A64: Implement FRSQRTE (vector), single/double variant
2020-04-22 20:46:22 +01:00
MerryMage
506e544bfe
IR: Implement FPRSqrtStepFused
2020-04-22 20:46:22 +01:00
MerryMage
66bb05fc0a
emit_x64_floating_point: Fixup special NaN case in FMA FPMulAdd implementation
2020-04-22 20:46:21 +01:00
MerryMage
0ce11b7b15
emit_x64_floating_point: Implement accurate fallback for FPMulAdd{32,64}
2020-04-22 20:46:21 +01:00
MerryMage
1c8e93e74d
block_of_code: Add SysV ABI fifth and sixth parameters
2020-04-22 20:46:21 +01:00
Lioncash
d65b056eba
Simplify fallback case for EmitVectorSetElement64()
2020-04-22 20:46:21 +01:00
MerryMage
6087c2af6f
emit_x64_floating_point: s/Esimate/Estimate/
2020-04-22 20:46:21 +01:00
MerryMage
bde58b04d4
IR: Implement FPRSqrtEstimate
2020-04-22 20:46:21 +01:00
MerryMage
55eaa16615
a64_emit_x64: Ensure host has updated ticks in EmitA64GetCNTPCT
...
Discovered by @Subv.
Fixes incomplete fix begun in 5a91c94dca47c9702dee20fbd5ae1f4c07eef9df.
That fix fails to take into account that LinkBlock doesn't update ticks until there
are no remaining ticks to be executed.
Test added to confirm fix.
2020-04-22 20:46:21 +01:00
MerryMage
edd795e991
a64_emit_x64: Fix stack misalignment on Windows for 128-bit exclusive writes
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Discovered by @Subv.
Includes a test to ensure this codepath is exercised on Windows.
2020-04-22 20:46:21 +01:00
Lioncash
04b4c8b0cf
emit_x64_aes: Eliminate extraneous usage of a scratch register in EmitAESInverseMixColumns()
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We can just use the same register the data is in as the result register,
eliminating the need to use a completely separate register to store the
result.
2020-04-22 20:46:21 +01:00
Lioncash
1dc1e3dcd8
fp: Use forward declarations where applicable
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Minimizes the amount of files that need to be rebuilt if the headers
ever change.
2020-04-22 20:46:21 +01:00
Lioncash
46cb0d813b
emit_x64_vector: Append 'v' prefix onto movq in AVX path
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This is something I missed when adding in the AVX broadcast code.
2020-04-22 20:46:21 +01:00
MerryMage
b53127600b
fp: A64::FPCR -> FP::FPCR
2020-04-22 20:46:21 +01:00
Lioncash
0ec8dac660
emit_x64: Remove FPSCR_RoundTowardsZero() virtual function from EmitContext struct
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This code was bugged in that we were comparing if the rounding mode was
not equal to rounding towards zero. Fortunately, however, nothing uses
this function anymore, and there's already the more general
FPSCR_RMode() available, so this can be removed entirely.
2020-04-22 20:46:21 +01:00
Lioncash
fd92e2f186
emit_x64: Add missing <array> include
...
Commit 755adef62e504a8d616de9dda8937d2428a9471b introduced a helper
alias for std::array, eliminating the need to manually type out sizes
for them, however I forgot to add the include for <array>
2020-04-22 20:46:21 +01:00
Lioncash
f939bd0228
emit_x64_vector{_floating_point}: Add helper alias for sizing arrays relative to vector width
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Avoids needing to remember to specify the proper size of the arrays, all
that's needed is to specify the type of the array and the size will
automatically be deduced from it. This helps prevent potential oversized
or undersized arrays from being specified.
2020-04-22 20:46:21 +01:00
MerryMage
58f3399032
A64/PopRSBHint: Prevent RETing to a guest PC of ~0ull from crashing the jit
2020-04-22 20:46:21 +01:00
MerryMage
e18fca17dc
A64: Implement FABD in terms of existing IR instructions
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Fixes NaN issue. Closes #306 .
2020-04-22 20:46:21 +01:00
MerryMage
83be491875
emit_x64_floating_point: SSE4.1 implementation of EmitFPRound
2020-04-22 20:46:20 +01:00
MerryMage
b228694012
IR: Implement FPRoundInt
2020-04-22 20:46:20 +01:00
MerryMage
295deb4035
a64_jit_state: Add FPSR.QC flag
2020-04-22 20:46:20 +01:00
Lioncash
7797bc2fb2
emit_x64_vector: Use non-scratch Use* variants of registers within EmitVectorUnsignedAbsoluteDifference()
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In some cases, a register isn't modified, depending on the branch taken,
so we can signify this by using the non-scratch variants in certain
cases.
2020-04-22 20:46:20 +01:00
MerryMage
33fa65de23
A64: Implement FADDP (vector)
2020-04-22 20:46:19 +01:00
MerryMage
9dba273a8c
A64: Implement SADDLP
2020-04-22 20:46:19 +01:00