mirrors/dynarmic
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

Commit graph

  • 793753bf63 IR: Implement Vector{Lower,}Broadcast{8,16,32,64} MerryMage 2018-01-24 12:00:28 +0000
  • 8ee854232c General: Default constructors and destructors where applicable Lioncash 2018-01-23 21:11:07 -0500
  • d1e4526e1c ir_emitter: Remove unused includes Lioncash 2018-01-23 20:40:08 -0500
  • 6f9216d544 A64: Implement RBIT Lioncash 2018-01-23 19:13:47 -0500
  • 9b0a21915f ir_emitted: Remove unimplemented IR instruction Unimplemented MerryMage 2018-01-23 22:16:15 +0000
  • db30e02ac8 emit_x64: Extract BlockRangeInformation, remove template parameter MerryMage 2018-01-23 19:16:39 +0000
  • 58c4a25527 emit_x64: Use JitStateInfo MerryMage 2018-01-23 18:47:10 +0000
  • d4b05b28cf A64: Implement CLS MerryMage 2018-01-23 18:22:42 +0000
  • b8e26bfdc3 A64: Implement ADDP (vector) MerryMage 2018-01-23 17:44:34 +0000
  • eaf545877a IR: Implement Vector{Lower,}PairedAdd{8,16,32,64} MerryMage 2018-01-23 16:45:28 +0000
  • a554e4a329 backend_x64: Split emit_x64 MerryMage 2018-01-23 13:21:10 +0000
  • 2a493f8b50 fuzz_with_unicorn: Compare vectors MerryMage 2018-01-23 17:45:34 +0000
  • 394bd57bb6 microinstruction: bug: Add missing opcodes MerryMage 2018-01-23 17:45:14 +0000
  • bb1c5bd3b2 A64: Implement SMADDL, SMSUBL, UMADDL, and UMSUBL Lioncash 2018-01-23 10:24:53 -0500
  • c1a25bfc2f A64: Implement MADD and MSUB Lioncash 2018-01-23 09:51:57 -0500
  • b7c5055d42 A64: Implement CLZ Lioncash 2018-01-22 10:54:48 -0500
  • b612782445 opcodes: Add 64-bit CountLeadingZeroes opcode Lioncash 2018-01-22 10:51:40 -0500
  • 4c4efb2213 data_processing_register: Clean-up MerryMage 2018-01-22 22:40:00 +0000
  • ae5dbcbed6 A64: Implement HINT, NOP, YIELD, WFE, WFI, SEV, and SEVL Lioncash 2018-01-21 19:50:31 -0500
  • 4d8f4aa8af A64: Implement ASRV, LSLV, LSRV, and RORV Lioncash 2018-01-21 22:28:24 -0500
  • a8a65beb2b data_processsing_conditional_select: Implement CSINC, CSINV and CSNEG Lioncash 2018-01-21 14:24:44 -0500
  • b08be71775 a32/a64_emit_x64: Remove unused includes Lioncash 2018-01-21 13:33:48 -0500
  • f81d0a2536 A64: Implement AND (vector) MerryMage 2018-01-21 18:27:06 +0000
  • 35aaee6cc6 tests/A64: Randomize vectors MerryMage 2018-01-21 17:55:26 +0000
  • 33a02ed91a tests/A64/unicorn: Print interrupt number when InterruptHook is hit MerryMage 2018-01-21 17:47:07 +0000
  • e9f6e7c82c tests/A64: Allow RunTestInstance to start from an arbitrary offset MerryMage 2018-01-21 17:46:18 +0000
  • a63fc6c89b A64: Implement ADD (vector, vector) MerryMage 2018-01-21 17:45:43 +0000
  • 896cf44f96 A64: Implement REV, REV32, and REV16 (#126) Thomas Guillemard 2018-01-21 13:17:47 +0100
  • 5eb0bdecdf IR: Simplify types. F32 -> U32, F64 -> U64, F128 -> U128 MerryMage 2018-01-19 01:09:46 +0000
  • 9a812b0c61 reg_alloc: GetBitWidth: Add UNREACHABLE MerryMage 2018-01-18 23:46:01 +0000
  • fff8e019dc reg_alloc: Consider bitwidth of data and registers when emitting instructions MerryMage 2018-01-18 13:00:07 +0000
  • 144b629d8a A64: Implement CSEL MerryMage 2018-01-18 11:37:17 +0000
  • 6395f09f94 IR: Implement Conditional Select MerryMage 2018-01-18 11:36:48 +0000
  • 7992a319ba A64/tests: Split unicorn sanity checking from other tests MerryMage 2018-01-17 20:00:42 +0000
  • 9d42bc3228 tests/A64: Single random instruction: Test branch instructions as well MerryMage 2018-01-17 00:35:01 +0000
  • 19da68568e A64/translate/branch: bug: Read-after-write error in BLR MerryMage 2018-01-17 00:34:33 +0000
  • 9f57283a30 A64: Implement SBFM, BFM, UBFM MerryMage 2018-01-17 00:10:28 +0000
  • cdbc8d07a5 A64: Implement MOVN, MOVZ, MOVK MerryMage 2018-01-15 21:47:28 +0000
  • cc6071d667 travis: Print current test information MerryMage 2018-01-14 20:38:28 +0000
  • c34639f33d fuzz_thumb: Off by one error MerryMage 2018-01-14 20:21:47 +0000
  • ecebe14a01 ir/location_descriptor: Add missing <functional> header for std::hash MerryMage 2018-01-14 13:50:29 +0000
  • a59e9ad9c6 travis: Run A64 tests MerryMage 2018-01-14 12:58:30 +0000
  • 4e3675da7b a64_merge_interpret_blocks: Remove debug output MerryMage 2018-01-13 22:05:05 +0000
  • e99db8e745 tests/A64: Randomize PSTATE.<NZCV> MerryMage 2018-01-13 21:51:50 +0000
  • c6a091d874 A64: Optimization: Merge interpret blocks MerryMage 2018-01-13 21:51:13 +0000
  • 99b7516c8c testenv: Use format constants MerryMage 2018-01-13 18:31:39 +0000
  • 39d083aa87 tests/A64: Unicorn interface fixes MerryMage 2018-01-13 18:30:02 +0000
  • d5725de26a tests/A64: Fuzz against unicorn MerryMage 2018-01-13 18:04:19 +0000
  • a0ef6eda19 tests/A64: Move TestEnvironment to own header MerryMage 2018-01-13 18:03:34 +0000
  • 21fe61eac6 A64/data_processing_pcrel: bug: ADR{,P} instructions sign extend their immediate MerryMage 2018-01-13 18:02:19 +0000
  • 7c4b70751c A64/data_processing_addsub: bug: {ADD,SUB}S (extended register) instructions write to ZR when d = 31 MerryMage 2018-01-13 18:01:43 +0000
  • 996ffd5488 a64_emit_x64: bug: A64CallSupervisor trampled callee-save registers MerryMage 2018-01-13 18:00:39 +0000
  • e4615a4562 emit_x64: bug: OP m/r64, imm32 form instructions sign-extend their immediate on x64 MerryMage 2018-01-13 17:59:50 +0000
  • 989d036e65 A64 inferface: Use two argument static_assert MerryMage 2018-01-13 17:58:05 +0000
  • 0992987c98 A64: Add ExceptionRaised IR instruction MerryMage 2018-01-13 17:54:29 +0000
  • 71a1851ee6 Update readme MerryMage 2018-01-12 20:05:17 +0000
  • 61125d6dd1 A64/translate: Add TranslateSingleInstruction function MerryMage 2018-01-12 19:34:25 +0000
  • aa74a8130b Misc. fixups of MSVC build MerryMage 2018-01-12 17:31:21 +0000
  • a1dfa01515 imm: Suppress MSVC warning C4244: value will never be truncated MerryMage 2018-01-12 17:18:07 +0000
  • 0c3a5adf74 Merge remote-tracking branch 'origin/master' into a64 MerryMage 2018-01-12 17:12:18 +0000
  • 2f8d7ae86f tests/a64: Use format constants MerryMage 2018-01-12 17:02:26 +0000
  • 26da149639 imm: compiler bug: MSVC 19.12 with /permissive- flag doesn't support fold expressions MerryMage 2018-01-12 16:22:38 +0000
  • b34c6616d4 A64/decoder: Split decoder data from header MerryMage 2018-01-11 13:02:15 +0000
  • 72a793f5b0 ir_opt: Split off A32 specific passes MerryMage 2018-01-10 19:24:19 +0000
  • 595f157e5e A64: Implement LDP, STP MerryMage 2018-01-10 02:05:08 +0000
  • 511215342b A64/location_descriptor: Fix -fpermissive warning on GCC MerryMage 2018-01-10 18:56:12 +0000
  • 243f06c613 A64: Implement LDP, STP MerryMage 2018-01-10 02:05:08 +0000
  • 25411da838 A32: Implement load stores (immediate) MerryMage 2018-01-10 01:13:23 +0000
  • 2aadeec291 A64: Implement SVC MerryMage 2018-01-09 21:29:21 +0000
  • 9e27e4d250 imm: bug: SignExtend wasn't working for T with bit size > 32 MerryMage 2018-01-09 21:22:17 +0000
  • 10c60dda97 a64_emit_x64: Don't use far code for now MerryMage 2018-01-09 21:21:50 +0000
  • 593a569b53 EmitA64SetW: bug: should zero extend to entire 64-bit register MerryMage 2018-01-09 21:21:15 +0000
  • 6bd9f02911 EmitA64SetNZCV: bug: to_store is scratch MerryMage 2018-01-09 21:20:55 +0000
  • f0276dd53b emit_x86: Fix nzcv for EmitSub MerryMage 2018-01-08 22:03:20 +0000
  • 68391b0a05 A64: Implement SVC MerryMage 2018-01-08 22:03:03 +0000
  • e5ace37560 a64_emit_x64: Call interpreter MerryMage 2018-01-08 18:33:42 +0000
  • b12dead76a A64: Add batch register retrieval to interface MerryMage 2018-01-08 17:26:49 +0000
  • cb481a3a48 A64: Implement compare and branch MerryMage 2018-01-07 16:33:02 +0000
  • e8bcf72ee5 A64: PSTATE access and tests MerryMage 2018-01-07 14:46:35 +0000
  • 23f3afe0b3 A64: Implement branch (register) MerryMage 2018-01-07 13:56:32 +0000
  • 86d1095df7 A64: Implement branch MerryMage 2018-01-07 13:42:11 +0000
  • 0641445e51 A64: Implement logical MerryMage 2018-01-07 12:52:12 +0000
  • 5a1d88c5dc A64: Implement pcrel MerryMage 2018-01-07 11:41:17 +0000
  • 7d11170aaf A32/location_descriptor: Disambiguate identifiers MerryMage 2018-01-10 18:40:31 +0000
  • c09e69bb97 A64: Implement addsub instructions MerryMage 2018-01-07 11:31:20 +0000
  • 83b55fe59b externals: Update catch to v2.1.0 MerryMage 2018-01-10 18:32:00 +0000
  • d1cef6ffb0 A64: Implement ADD_shifted MerryMage 2018-01-07 00:11:57 +0000
  • d1eb757f93 A64: Backend framework MerryMage 2018-01-06 21:15:25 +0000
  • e161cf16f5 A64: Initial framework MerryMage 2018-01-04 23:05:27 +0000
  • 7639f6ebdc externals: Update fmt subtree to 4.10 MerryMage 2020-04-22 20:41:46 +0100
  • 097203968f Squashed 'externals/fmt/' changes from 39834389..135ab5cf MerryMage 2020-04-22 20:41:46 +0100
  • 0830af2054 appveyor: Use a more recent version of boost MerryMage 2018-01-09 19:12:20 +0000
  • cde2d48eb9 CMakeLists: CMAKE_CXX_STANDARD as no effect on MSVC until CMake 3.10 MerryMage 2018-01-09 18:41:22 +0000
  • f61da0b5a9 IR: Compile-time type-checking of IR MerryMage 2018-01-05 21:47:23 +0000
  • 44f7f04b5c IR/Value: Rename RegRef and ExtRegRef to A32Reg and A32ExtReg MerryMage 2018-01-05 20:30:41 +0000
  • 83022322d1 Make IR->A32 LocationDescriptor conversion explicit MerryMage 2018-01-05 19:12:13 +0000
  • 9d15e0a8e1 Final A32 refactor MerryMage 2018-01-04 21:12:02 +0000
  • 455757d7b6 EmitX64: JitState type as template parameter MerryMage 2018-01-02 17:45:39 +0000
  • 2d164d9345 Package up emit context MerryMage 2018-01-01 23:40:34 +0000
  • 7bf421dd38 Rename JitState to A32JitState MerryMage 2018-01-01 22:49:17 +0000