MerryMage
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05e97058c3
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parallel: Add and Subtract with Exchange improvements
* Remove asx argument from PackedHalvingSubAdd{U16,S16} IR instruction
* Implement Packed{Halving,}{AddSub,SubAdd}{U16,S16} IR instructions
* Implement SASX, SSAX, UASX, USAX
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2017-03-24 15:56:24 +00:00 |
|
Lynn
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fd068ed6b8
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Ranged cache invalidation
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2017-03-20 11:58:25 +00:00 |
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MerryMage
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92a01b0cd8
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Prefer ASSERT to DEBUG_ASSERT
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2017-02-26 23:30:40 +00:00 |
|
MerryMage
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bbeea72eba
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ir_opt: Remove redundant shift instructions
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2017-02-26 15:28:14 +00:00 |
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MerryMage
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4ed8ee7489
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microinstruction: Void arguments when invalidating instruction
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2017-02-18 21:29:23 +00:00 |
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MerryMage
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7fa5845c1f
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extension: Implement SXTAB16 and SXTB16
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2017-02-18 20:14:44 +00:00 |
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MerryMage
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73d1cf36c3
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extension: Simplify UXTB16
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2017-02-18 20:14:39 +00:00 |
|
MerryMage
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6edcfeba0b
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extension: Simplify rotation code
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2017-02-18 20:14:37 +00:00 |
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MerryMage
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cc9d2c4603
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saturated: Implement SSAT16 and USAT16
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2017-02-18 17:43:57 +00:00 |
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MerryMage
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358cf7c322
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vfp: Implement vectorized VFP instructions
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2017-02-18 01:13:25 +00:00 |
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MerryMage
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f2dd82967f
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load_store: Simplify implementation
* Remove dead code
* Standardise code style with rest of code base
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2017-02-16 22:28:56 +00:00 |
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MerryMage
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5a20a37d3f
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arm/fpscr: Correct Stride implementation
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2017-02-11 12:13:57 +00:00 |
|
MerryMage
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033e8b9b1e
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vfp: Rename variables a, b, c to more sensible names
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2017-02-06 21:14:36 +00:00 |
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MerryMage
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642ccb0f66
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ir/value: Support U16 immediates
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2017-01-29 22:58:11 +00:00 |
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MerryMage
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5f7ffe0d0b
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microinstruction: Implement Inst::AreAllArgsImmediates
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2017-01-29 22:56:59 +00:00 |
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MerryMage
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22804dc6a5
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microinstruction: Arguments of Inst::Use and Inst::UndoUse should be const
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2017-01-29 22:53:46 +00:00 |
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MerryMage
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1d4446cad5
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microinstruction: Removed unnecessary reference from argument of Inst::ReplaceUsesWith
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2017-01-29 22:52:33 +00:00 |
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MerryMage
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e3bc7d039f
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Implement CDP, LDC, MCR, MCRR, MRC, MRRC, STC
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2017-01-08 14:56:06 +00:00 |
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MerryMage
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48693eb6ff
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Implement coprocessor-related microinstructions
* CoprocInternalOperation
* CoprocSendOneWord
* CoprocSendTwoWords
* CoprocGetOneWord
* CoprocGetTwoWords
* CoprocLoadWords
* CoprocStoreWords
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2017-01-08 14:56:06 +00:00 |
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MerryMage
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b3ae57619d
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types: Formatting for CoprogReg
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2017-01-08 14:56:06 +00:00 |
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MerryMage
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d8a37e287c
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IR: Add IR type CoprocInfo
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2017-01-08 14:56:06 +00:00 |
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MerryMage
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1efd3a764d
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IR: Remove unused microinstructions NegateLowWord and NegateHighWord
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2017-01-05 20:16:39 +00:00 |
|
Fernando Sahmkow
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70f4235ee9
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Implement UXTAB16 (#78)
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2016-12-29 12:15:18 +00:00 |
|
FernandoS27
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d5610eb26c
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Implement UHASX, UHSAX, SHASX and SHSAX (#75)
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2016-12-28 21:32:22 +00:00 |
|
MerryMage
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e9df248d56
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decoder_detail: Support const member functions
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2016-12-23 11:33:40 +00:00 |
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MerryMage
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b1bad4b5cc
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decoder_detail: static_assert member function is from visitor class
Improves readability of compiler errors.
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2016-12-23 11:10:02 +00:00 |
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MerryMage
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c78f153ddb
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decoder/arm: Sort decoders according to number of bits in mask
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2016-12-22 15:25:38 +00:00 |
|
MerryMage
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cb38c94b58
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decoder/arm: Fix decoding of RFE
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2016-12-22 15:25:07 +00:00 |
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MerryMage
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7e77ee7fd6
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decoder/arm: Fix decoding of MCR2
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2016-12-22 15:11:47 +00:00 |
|
Fernando Sahmkow
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677f62dd6f
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Implement SHSUB8 and SHSUB16 (#74)
* Implement IR operations PackedHalvingSubS8 and PackedHalvingSubS16
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2016-12-22 12:02:24 +00:00 |
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MerryMage
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967f3cf7e1
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Implement CPS (Thumb)
* Since currently only User mode is emulated, CPS is a NOP.
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2016-12-21 22:44:27 +00:00 |
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MerryMage
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c764a2b889
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Implement MUL (T1)
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2016-12-21 22:44:14 +00:00 |
|
MerryMage
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36082087de
|
callbacks: Read code using MemoryReadCode callback
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2016-12-21 21:39:14 +00:00 |
|
MerryMage
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56ea2386d3
|
saturated: Implement SSAT and USAT
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2016-12-21 19:51:25 +00:00 |
|
MerryMage
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6a269a6ebd
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IR: Add microinstructions UnsignedSaturation and SignedSaturation
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2016-12-21 19:51:25 +00:00 |
|
FernandoS27
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8919265d2c
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Implement SADD8, SADD16, SSUB8, SSUB16, USUB16
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2016-12-20 21:52:38 +00:00 |
|
FernandoS27
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3f6ecfe245
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Implemented USAD8 and USADA8
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2016-12-20 21:52:38 +00:00 |
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MerryMage
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96e46ba6b5
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Implement QADD, QSUB, QDADD, QDSUB
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2016-12-15 22:34:29 +00:00 |
|
MerryMage
|
b178ab3bec
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Replace (void)(...); idiom with UNUSED macro
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2016-12-15 21:36:05 +00:00 |
|
MerryMage
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df197ff6b1
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arm/types: Use smallest possible standard type that has sufficient bits for Imm{} types
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2016-12-15 20:52:21 +00:00 |
|
MerryMage
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546198d603
|
translate_arm: Mark arguments as unused
|
2016-12-15 20:52:20 +00:00 |
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MerryMage
|
8d5522f4a0
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dissassembler_arm: Support BKPT, QASX, QSAX, UQASX, UQSAX
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2016-12-15 20:16:08 +00:00 |
|
MerryMage
|
52e1445f43
|
Implement USUB8
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2016-12-05 00:29:15 +00:00 |
|
MerryMage
|
5c1aab1666
|
Implement CLZ
Includes tests
|
2016-12-04 22:56:33 +00:00 |
|
MerryMage
|
1a1646d962
|
Implement UADD8
|
2016-12-04 20:52:33 +00:00 |
|
MerryMage
|
7cad6949e7
|
IR: Implement new pseudo-operation GetGEFromOp
|
2016-12-04 20:52:06 +00:00 |
|
MerryMage
|
e166965f3e
|
Implement VCMP
|
2016-12-03 11:41:09 +00:00 |
|
MerryMage
|
f2fe376fc6
|
Support 64-bit immediates
|
2016-12-03 11:29:50 +00:00 |
|
Mat M
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de1f831d79
|
microinstruction: Make use_count private (#53)
Makes the operation a part of the direct interface.
|
2016-11-30 21:51:06 +00:00 |
|
Merry
|
0ff8c375af
|
Implement UHSUB8 and UHSUB16 (#48)
|
2016-11-26 18:27:21 +00:00 |
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