MerryMage
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51b155df92
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A32: Introduce PreCodeTranslationHook
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2021-05-22 14:16:10 +01:00 |
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Merry
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714216fd0e
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Consolidate all source files into src/ directory
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2021-05-19 17:41:59 +01:00 |
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MerryMage
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b93ae62acf
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thumb32: Add coprocessor instructions
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2021-05-13 18:15:35 +01:00 |
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MerryMage
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61333917a4
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thumb32: Implement MRS (register)
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2021-05-04 12:43:38 +01:00 |
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MerryMage
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a5a210a9a5
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T32: Add ASIMD instructions
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2021-05-04 00:09:55 +01:00 |
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MerryMage
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d1e62b9993
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T32: Add VFP instructions
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2021-05-04 00:09:55 +01:00 |
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MerryMage
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e19f898aa2
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ir: Reorganize to new top level folder
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2021-04-21 22:22:07 +01:00 |
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Lioncash
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f5263cc196
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thumb32: Implement exclusive loads
Implements the remaining loads for ARMv7
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2021-04-19 19:46:19 +01:00 |
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Lioncash
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6241ff6be2
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thumb32: Implement STREX variants
Implements the exclusive store instructions. Now all that remains for
ARMv7 load/stores to be done is the exclusive loads.
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2021-04-10 17:15:19 +01:00 |
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MerryMage
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f77b0e2fbe
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A32/thumb16: Implement IT instruction
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2021-02-07 20:41:48 +00:00 |
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MerryMage
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68bd9547c5
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fuzz_arm: Correctly print thumb instruction listing
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2021-02-07 20:41:48 +00:00 |
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MerryMage
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a599c29d9e
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testenv: Ignore warning C4309
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2021-02-07 09:57:17 +00:00 |
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MerryMage
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b252636dc3
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a32_unicorn: Halt when PC leaves code_mem
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2021-02-06 22:15:02 +00:00 |
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MerryMage
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331a02e02e
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fuzz_arm: Add fuzzing for thumb instructions
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2021-02-06 21:41:01 +00:00 |
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Lioncash
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23619c8c6a
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thumb32: Implement SHSUB8/UHSUB8
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2021-02-01 17:50:46 -05:00 |
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Lioncash
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9d2570470e
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thumb32: Implement SHADD8/UHADD8
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2021-02-01 17:50:46 -05:00 |
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Lioncash
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afad76078d
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thumb32: Implement SHSUB16/UHSUB16
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2021-02-01 17:50:46 -05:00 |
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Lioncash
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51b7c32d02
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thumb32: Implement SHSAX/UHSAX
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2021-02-01 17:50:46 -05:00 |
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Lioncash
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f0a219fcd0
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thumb32: Implement SHASX/UHASX
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2021-02-01 17:50:46 -05:00 |
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Lioncash
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94f8efbb03
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thumb32: Implement SHADD16/UHADD16
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2021-02-01 17:50:46 -05:00 |
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Lioncash
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aa49b0db89
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thumb32: Implement QSUB8/UQSUB8
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2021-02-01 17:50:46 -05:00 |
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Lioncash
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874ab6a7b6
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thumb32: Implement QADD8/UQADD8
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2021-02-01 17:50:46 -05:00 |
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Lioncash
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d923fb24c6
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thumb32: Implement QSUB16/UQSUB16
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2021-02-01 17:50:46 -05:00 |
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Lioncash
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416fe26df0
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thumb32: Implement QSAX/UQSAX
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2021-02-01 17:50:14 -05:00 |
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Lioncash
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ad7c8bd042
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thumb32: Implement QASX/UQASX
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2021-02-01 17:31:30 -05:00 |
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Lioncash
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f52b8f924c
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thumb32: Implement QADD16/UQADD16
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2021-02-01 17:31:30 -05:00 |
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Lioncash
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6f593da41b
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thumb32: Implement SSUB8/USUB8
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2021-02-01 17:31:27 -05:00 |
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Lioncash
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271354ee95
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thumb32: Implement SADD8/UADD8
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2021-02-01 16:44:11 -05:00 |
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Lioncash
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8f42fd5c0e
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thumb32: Implement SSUB16/USUB16
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2021-02-01 16:41:02 -05:00 |
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Lioncash
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0e28c63456
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thumb32: Implement SSAX/USAX
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2021-02-01 16:36:18 -05:00 |
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Lioncash
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21e404d3ab
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thumb32: Implement SASX/UASX
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2021-02-01 16:31:25 -05:00 |
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Lioncash
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d529417875
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thumb32: Implement SADD16/UADD16
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2021-02-01 16:19:33 -05:00 |
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Lioncash
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36fc596a51
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thumb32: Implement QADD
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2021-02-01 15:44:09 -05:00 |
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Lioncash
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cd6e4c7afd
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thumb32: Implement QSUB
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2021-02-01 15:42:14 -05:00 |
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Lioncash
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65365ad2a3
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thumb32: Implement QDADD
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2021-02-01 15:39:39 -05:00 |
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Lioncash
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c60cf921ee
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thumb32: Implement REV
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2021-02-01 15:30:40 -05:00 |
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Lioncash
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0304dc7ce4
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thumb32: Implement REV16
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2021-02-01 15:27:31 -05:00 |
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Lioncash
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cee31c5274
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thumb32: Implement RBIT
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2021-02-01 15:20:24 -05:00 |
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Lioncash
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e2bc7eeb93
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thumb32: Implement REVSH
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2021-02-01 15:16:53 -05:00 |
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Lioncash
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95dabcf48e
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fuzz_thumb: Allow running only Thumb-16 tests
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2021-02-01 15:04:29 -05:00 |
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Lioncash
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1ad99bb9b5
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thumb32: Implement SEL
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2021-02-01 15:01:21 -05:00 |
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Lioncash
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8d53048750
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thumb32: Implement CLZ
Also fleshes out the generator to allow for generating thumb32
instructions as well.
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2021-02-01 14:54:04 -05:00 |
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MerryMage
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4ba1f8b9e7
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Add optimization flags to disable specific optimizations
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2020-07-04 11:04:10 +01:00 |
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MerryMage
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3eed024caf
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asimd_three_same: Ignore Q=1 for VPADD (floating-point)
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2020-07-04 11:04:10 +01:00 |
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MerryMage
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2008fda88b
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emit_x64_floating_point: Correct error in s16 rounding in EmitFPToFixed
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2020-06-22 22:54:38 +01:00 |
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MerryMage
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3ea49fc6d6
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A32: Implement VFPv3 VCT (between floating-point and fixed-point)
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2020-06-22 22:08:58 +01:00 |
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MerryMage
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69a1d58a2b
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A32: Implement ASIMD VMULL
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2020-06-21 10:00:24 +01:00 |
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MerryMage
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70d071e6ab
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fuzz_arm: Test large random blocks
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2020-06-21 00:41:54 +01:00 |
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MerryMage
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214c1d6002
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fuzz_arm: Test testable parts of ASIMD VRECPE and VRSQRTE
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2020-06-20 15:17:39 +01:00 |
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MerryMage
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92cb4a5a34
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A32: Implement ASIMD VRSQRTE
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2020-06-20 15:13:22 +01:00 |
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