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1414 commits

Author SHA1 Message Date
Mat M
72897b5def types: Provide ostream operator<< overloads where applicable (#30) 2016-09-07 14:21:17 +01:00
Mat M
6a2174ebfa Add missing explicit specifiers (#27) 2016-09-07 12:08:48 +01:00
Mat M
6e0f27a500 types: Add helpers for determining single and doubleword extension registers (#26) 2016-09-07 12:08:35 +01:00
Mat M
5bc9ce544f arm_types: Move into arm folder (#25) 2016-09-06 00:52:33 +01:00
Mat M
b40d19c3b7 location_descriptor: Provide operator<< string overload (#24) 2016-09-05 21:31:25 +01:00
Mat M
6d53bb6d7e arm_types: Split out LocationDescriptor (#20) 
This isn't really an ARM-specific type, since it's used to indicate a
Block location.
 2016-09-05 11:54:09 +01:00
Mat M
84336cf29d value: Change Value into a class (#19) 
'struct' is a little bit of a misnomer, considering it has invariants
 2016-09-05 11:53:56 +01:00
Mat M
858796a029 Eliminate variable shadowing warnings with MSVC (#17) 2016-09-04 11:30:57 +01:00
Mat M
7f9a0c3c38 Remove unnecessary explicit includes (#16) 2016-09-03 21:48:03 +01:00
Mat M
05b189bc26 arm_types: Specialize std::hash for LocationDescriptor (#14) 
Same thing, but with the benefit of working with anything that uses
std::hash by default.
 2016-09-03 12:48:47 +01:00
Mat M
8c4df46580 FPSCR: Make value constructor explicit (#13) 
Maintains consistency between the PSR helper.
 2016-09-03 12:48:31 +01:00
Mat M
5aa4f753b6 load_store: Add checks for unpredictability to other singular store instructions (#11) 2016-09-02 21:10:28 +01:00
Mat M
6ec651498d arm: Add PSR helper type (#3) 2016-09-02 17:34:33 +01:00
Mat M
00d0f4d5ff load_store: Add correctness checks for STRD variants (#7) 
STRD doesn't allow the use of the PC in either Rt or Rt2
 2016-09-02 17:32:02 +01:00
MerryMage
ba04be5071 travis: Build on OS X 2016-09-02 17:08:09 +01:00
MerryMage
b3743e9453 Revert "arm_types: Don't use std::hash<u64>() for LocationDescriptorHash" 
This reverts commit 519c714dbc.
 2016-09-02 14:33:56 +01:00
MerryMage
519c714dbc arm_types: Don't use std::hash<u64>() for LocationDescriptorHash 
Apple Clang (clang-600.0.54 on x86_64-apple-darwin13.4.0) complains with:

implicit instantiation of undefined template 'std::__1::hash<unsigned long long>'
 2016-09-02 12:45:09 +01:00
Mat M
a465b2ddbc ir_emitter: Fix typo. ClearExlcusive -> ClearExclusive (#5) 2016-09-02 12:17:22 +01:00
Mat M
ea157dfd52 translate_arm: const-correctness (#6) 2016-09-02 12:17:02 +01:00
Mat M
7e3c981974 translate: Forward declare LocationDescriptor (#2) 2016-09-01 09:46:35 +01:00
MerryMage
dca3b2f079 Implement VMRS and VMSR 2016-08-26 22:47:54 +01:00
Lioncash
0102951bdd Convert formatting over to fmtlib 2016-08-26 13:13:19 +01:00
MerryMage
4322c0907c microinstruction: Rename FindUseWithOpcode to GetAssociatedPseudoOperation, encapsulate associated variables 2016-08-25 21:08:47 +01:00
MerryMage
30df51c2dc ir_emitter: Should be in the IR namespace, not the Arm namespace 2016-08-25 17:36:42 +01:00
MerryMage
922d1fd198 Merge branch 'xbyak' 2016-08-25 16:54:48 +01:00
MerryMage
e32812cd00 Port x64 backend to xbyak 2016-08-25 16:18:17 +01:00
Lioncash
0e12fb6a56 basic_block: Move all variables behind a public interface 2016-08-25 16:14:37 +01:00
Lioncash
1d8432487d arm_types: Provide the not-equals operator overload for LocationDescriptor 
Generally if == has an overload, != should be provided for symmetry.
 2016-08-25 14:08:16 +01:00
MerryMage
dc26afbd7e translate_arm: Translate more than one conditional instruction in a block 2016-08-25 13:05:33 +01:00
MerryMage
aa9b63bac4 basic_block: DumpBlock now dumps terminal details 2016-08-25 13:01:32 +01:00
Lioncash
37755cbfec translate: Simplify function pointer calls 
They can just be called like regular functions
 2016-08-24 23:19:50 +01:00
Lioncash
eba3a06d80 frontend: Introduce FPSCR register helper class 
Encapsulates all of the FPSCR state.
 2016-08-24 20:51:14 +01:00
MerryMage
b5a86889cd Implement VCVT 2016-08-23 22:20:04 +01:00
MerryMage
78464a8f01 translate_arm/vfp2: Implement VSTM (A1, A2) 2016-08-23 20:54:38 +01:00
MerryMage
a96704eb0f arm_types: new_reg >= 0 is always true since new_reg is unsigned 2016-08-23 20:11:41 +01:00
MerryMage
7a01dba3c4 arm_types: Change type signature of operator+ to size_t instead of int 2016-08-23 20:07:53 +01:00
MerryMage
af9a68f0d1 translate_arm/vfp2: Implement VLDM (A1, A2) 2016-08-23 20:07:06 +01:00
Lioncash
d5805cc6eb intrusive_list: Add size querying 
Since we store pointers and have an interface for iterators
set up, the count is just the distance from the beginning
to the end of the list.

Nice thing is that because of this, basic blocks also get
the ability to have a size count without needing to do anything
directly.
 2016-08-23 19:52:09 +01:00
Lioncash
2180a4be7a basic_block: Use a range-based for loop for iteration 2016-08-23 19:51:01 +01:00
Lioncash
867d345fdc disassembler: Deduplicate SignStr 
Also just makes it return a character, rather than a pointer to a
string.
 2016-08-23 16:40:33 +01:00
MerryMage
e0f9dead5d microinstruction: Identity's type depends on the type of its argument 2016-08-23 15:48:30 +01:00
MerryMage
8c7a81a308 VPOP and VPUSH are floating-point load-store instructions 2016-08-23 14:26:50 +01:00
MerryMage
8d1b9f32ca Standardize indentation of switch statments 2016-08-23 12:19:27 +01:00
MerryMage
2471be317e arm_types: Implement LocationDescription::FPSCR_RMode 2016-08-23 02:22:04 +01:00
Lioncash
47f285249b microinstruction: Introduce convenience informational functions 
Whenever more rigorous optimizations are attempted (or even basic ones),
it's usually helpful to know what overall kind of instruction is being
dealt with, in the event certain classes of instructions may be eligible
for optimization.
 2016-08-22 21:36:48 +01:00
Lioncash
06ec4b5977 microinstruction: Make constructor explicit 2016-08-22 16:01:18 +01:00
MerryMage
843d29b5a9 translate_arm/branch: Read-after-write in arm_BLX_reg 
When BLX LR is translated, BXWritePC(GetRegister(Reg::LR)) was executed
after the SetRegister(Reg::LR, _) update was done.
 2016-08-22 15:53:56 +01:00
MerryMage
d8bee60947 translate_thumb: Read-after-write in thumb16_BLX_reg 
When the instruction BLX LR is translated, BXWritePC(GetRegister(Reg::LR))
was executed after the SetRegister(Reg::LR, _) update was performed.
 2016-08-22 14:28:51 +01:00
Lioncash
1abe881921 basic_block: Add proxy member functions for the instruction list 
Currently basic block kind of acts like a 'dumb struct' which makes things
a little more verbose to write (as opposed to keeping it all in one place,
I guess). It's also a little wonky conceptually, considering a block is
composed of instructions (i.e. 'contains' them).

So providing accessors that make it act more like a container can make working
with algorithms a little nicer. It also makes the API a little more
defined.

Ideally, the list would be only available through a function, but
currently, the pool allocator is exposed, which seems somewhat odd,
considering the block itself should manage its overall allocations
(with placement new, and regular new), rather than putting that
sanitizing directly on the IR emitter (it should just care about emission,
not block state). However, recontaining that can be followed up with,
as it's very trivial to do.
 2016-08-22 13:44:56 +01:00
Lioncash
a8ba15f0d5 intrusive_list: Make Remove and IsEmpty stdlib compatible 
Makes the name match the standard library equivalents.

C++17 introduces non-member empty() which allows for nicer handling
in generic contexts. May as well make the data structure compatible with
it.
 2016-08-19 20:25:18 +01:00