Lioncash
fab3a59e05
A32: Implement ARM-mode BFC
2020-04-22 21:02:46 +01:00
Lioncash
7305d13221
A32: Implement ARM-mode RBIT
2020-04-22 21:02:46 +01:00
Lioncash
b2f7a0e7ba
A32: Implement ARM-mode SDIV/UDIV
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Now that we have Unicorn in place, we can freely implement instructions
introduced in newer versions of the ARM architecture.
2020-04-22 21:02:46 +01:00
Lioncash
c0ae23bbb7
A32/translate_thumb: Clean up formatting
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Performs a similar tidying up of the Thumb translator, like what was
done with the regular ARM translator to make it consistent with the rest
of the codebase.
The A32 backend (both Thumb and ARM), will likely see more changes to it
in the near future, so this just acts as a "dusting off".
2020-04-22 21:02:46 +01:00
Merry
d7da53a74b
Merge pull request #472 from lioncash/exception
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general: Mark hash functions as noexcept
2020-04-22 21:01:44 +01:00
Lioncash
7bb5440507
general: Mark hash functions as noexcept
...
Generally hash functions shouldn't throw exceptions. It's also a
requirement for the standard library-provided hash functions to not
throw exceptions.
An exception to this rule is made for user-defined specializations,
however we can just be consistent with the standard library on this to
allow it to play nicer with it.
While we're at it, we can also make the std::less specializations
noexcpet as well, since they also can't throw.
2020-04-22 21:01:43 +01:00
Lioncash
fe95575b95
general: Replace unreachable-imitating assertions with UNREACHABLE()
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We can just use the self-documenting assertion for indicating
unreachable paths, instead of manually passing false and providing a
message.
2020-04-22 21:01:43 +01:00
Lioncash
7c81a58ed3
frontend/ir/ir_emitter: Alter parameters of FPDoubleToSingle() and FPSingleToDouble() to pass along desired rounding mode
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This will be necessary to special-case the non-IEEE Von Neumann rounding
to odd rounding mode.
2020-04-22 20:58:10 +01:00
Lioncash
05a6ab691d
translate_arm/coprocessor: Minor tidying up
2020-04-22 20:58:10 +01:00
Lioncash
1e32a09c03
translate_arm/vfp2: Invert conditionals where applicable
2020-04-22 20:58:10 +01:00
Lioncash
e209b31073
translate_arm/synchronization: Invert conditionals where applicable
2020-04-22 20:58:10 +01:00
Lioncash
9514e3602e
translate_arm/status_register_access: Invert conditionals where applicable
2020-04-22 20:58:10 +01:00
Lioncash
c6aa1a708a
translate_arm/saturated: Invert conditionals where applicable
2020-04-22 20:58:10 +01:00
Lioncash
a72813599a
translate_arm/reversal: Invert conditionals where applicable
2020-04-22 20:58:10 +01:00
Lioncash
7be56e6b67
translate_arm/parallel: Invert conditionals where applicable
2020-04-22 20:58:10 +01:00
Lioncash
3c00a616d6
translate_arm/packing: Invert conditionals where applicable
2020-04-22 20:58:10 +01:00
Lioncash
c711188f46
translate_arm/multiply: Invert conditionals where applicable
2020-04-22 20:58:10 +01:00
Lioncash
c8dad40d81
translate_arm/misc: Invert conditionals where applicable
2020-04-22 20:58:10 +01:00
Lioncash
a7bf5ff77d
translate_arm/load_store: Invert conditionals where applicable
2020-04-22 20:58:10 +01:00
Lioncash
f4b19a7393
translate_arm/extension: Invert conditionals where applicable
2020-04-22 20:58:09 +01:00
Lioncash
c2de6ecfd0
translate_arm/exception_generating: Invert conditionals where applicable
2020-04-22 20:58:09 +01:00
Lioncash
d8a8d3b073
translate_arm/data_processing: Invert conditionals where applicable
2020-04-22 20:58:09 +01:00
Lioncash
df5c51ff47
translate_arm/branch: Invert conditionals where applicable
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Allows unindenting code a bit.
2020-04-22 20:58:09 +01:00
Lioncash
ee973f13c7
frontend/A32/ir_emitter: Mark PC() and AlignPC() as const-qualified member functions
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These don't modify instance state, so they can be const-qualified member
functions.
2020-04-22 20:57:38 +01:00
V.Kalyuzhny
764a93bf5a
Switch boost::optional to std::optional
2020-04-22 20:57:37 +01:00
MerryMage
2524d536b0
A32/ir_emitter: Bugfix: ExceptionRaised was producing incorrect PC
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Use actual PC and not pipelined PC.
2020-04-22 20:56:01 +01:00
MerryMage
90193b0e3d
IR: Add fbits argument to FixedToFP-related opcodes
2020-04-22 20:55:06 +01:00
MerryMage
f96c43d422
A32: Implement FastDispatchHint
2020-04-22 20:53:46 +01:00
MerryMage
3415828fb4
IR: Simplify FP{Single,Double}ToFixed{U,S}{32,64}
2020-04-22 20:53:46 +01:00
Lioncash
e30f9816ec
A32/decoder: Add missing <algorithm> includes
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These includes should be present, as we use std::find_if() within these headers.
2020-04-22 20:53:46 +01:00
MerryMage
f0184c4b8d
a32/exception_generating: BPKT: Define unpredictable behaviour
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Define unpredictable behaviour to be BKPT executes conditionally
2020-04-22 20:53:46 +01:00
MerryMage
a12854857b
A32: Add define_unpredictable_behaviour option
2020-04-22 20:53:46 +01:00
MerryMage
b0abaa8312
A32/location_descriptor: Change formatting to use hex
2020-04-22 20:53:46 +01:00
MerryMage
6595e49a31
A32/types: CondToString: Add nv
2020-04-22 20:53:46 +01:00
MerryMage
f73104633b
a32_emit_x64: Fix incorrect BMI2 implementation for SetCpsr
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* The MSB for each byte in cpsr_ge were not being appropriately set.
* We also expand test coverage to test this case.
* We fix the disassembly of the MSR (imm) and MSR (reg) instructions as well.
2020-04-22 20:53:46 +01:00
Lioncash
2188765e28
ir/value: Use type alias CoprocessorInfo for std::array<u8, 8>
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Provides a more descriptive label for the interface, and avoids the need
to hardcode the array size in multiple places.
2020-04-22 20:46:23 +01:00
MerryMage
71e137715d
status_register_access: Add support for bits 0 and 1 of mask to MSR
2020-04-22 20:46:23 +01:00
MerryMage
ac51c2547d
A32/translate/load_store: Correct detection of writeback
2020-04-22 20:46:23 +01:00
MerryMage
d345220251
A32/translate: Add TranslateSingleInstruction
2020-04-22 20:46:23 +01:00
MerryMage
5fc197c564
A32/ir_emitter: Bug fix: IREmitter::ExceptionRaised using incorrect opcode
2020-04-22 20:46:23 +01:00
MerryMage
ff3805e332
A32/decoders: Split instruction list into include file
2020-04-22 20:46:23 +01:00
Lioncash
9db6d1e98b
translate_arm: Remove unnecessary rotr() function
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We already have RotateRight() in our common code, so we can remove this
function and replace it with it. We can also implement ArmExpandImm_C()
in terms of ArmExpandImm().
2020-04-22 20:46:20 +01:00
MerryMage
caaf36dfd6
IR: Initial implementation of FP{Double,Single}ToFixed{S,U}{32,64}
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This implementation just falls-back to the software floating point implementation.
2020-04-22 20:46:19 +01:00
MerryMage
d875c08ebf
fp: Extract common RoundingMode enum
2020-04-22 20:46:18 +01:00
Lioncash
b38dd191bd
disassembler_arm: Remove rotation helper function in favor of Common::RotateRight
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Mildly reduces the amount of duplicated behavior
2020-04-22 20:46:17 +01:00
Lioncash
6bcfdba1ad
general: Remove unused lambda captures
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Resolves warnings that occur in Xcode 9.3
2020-04-22 20:46:16 +01:00
MerryMage
575590d18d
ir_emitter: Remove overloads
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Having overloads made explicit casting necesssary for these functions when
using types like UAny.
2020-04-22 20:46:15 +01:00
MerryMage
01c1e9017e
T32: Add initial decoder list
2020-04-22 20:46:14 +01:00
MerryMage
ba4a779c62
A32/decoder/arm: bug: Correct bitstring for SRS
2020-04-22 20:46:13 +01:00
MerryMage
aac5af50e2
IR: FPCompare{32,64} now return NZCV flags instead of implicitly setting them
2020-04-22 20:46:13 +01:00