Lioncash
4b371c0445
A32: Implement ASIMD VREV{16, 32, 64}
2020-06-17 10:21:59 +01:00
Lioncash
6dd2c94095
A32: Implement ASIMD VABS
...
Very similar to VNEG in that the only thing that differs is the function
called.
2020-06-16 22:42:18 +01:00
MerryMage
53422bec46
a64_emit_x64: Reduce code duplication in exclusive memory code
2020-06-16 18:16:33 +01:00
MerryMage
a1c9bb94a8
A32: Add yuzu-specific hacks
2020-06-16 17:54:21 +01:00
MerryMage
2c1a4843ad
A32 global exlcusive monitor
2020-06-16 17:54:21 +01:00
MerryMage
58abdcce5b
backend/x64/a32_*: Rename config to conf
...
Standardize on one name for both a32_* and a64_*.
2020-06-16 14:56:44 +01:00
MerryMage
7ea521b8bf
a32_emit_x64: Change ExclusiveWriteMemory64 to require a single U64 argument
2020-06-16 13:32:50 +01:00
MerryMage
aa341b7eea
a32_emit_x64: Make ExclusiveWrite a member function of A32EmitX64
2020-06-16 13:03:17 +01:00
MerryMage
62e04845b1
A64/config: Provide default implementation of MemoryWriteExclusive functions
...
Returning false is always safe, because this means the exclusive write has failed.
2020-06-16 13:00:37 +01:00
MerryMage
34ef5142e3
a32_emit_x64: Specify callback as template argument
...
Removes unnecessary switch statement.
2020-06-16 10:23:51 +01:00
MerryMage
58b2c83944
a32_emit_x64: Reduce mov code duplication in {Read,Write}Memory
2020-06-16 10:14:06 +01:00
Lioncash
aabd0d824d
A32: Add immediate creation helper
...
Provides the same helper function that exists within the A64 frontend
for creating immediate values.
2020-06-16 09:54:28 +01:00
Lioncash
93ed3441b7
A32: Implement ASIMD VCLS/VCLZ/VCNT
2020-06-16 09:54:28 +01:00
Lioncash
9b06a938a9
fuzz_arm: Ignore endian bit
...
A recent change from Qemu (268b1b3dfbb92a9348406f728a33f39e3d8dcd8)
allows user space modification of the E bit.
2020-06-16 01:53:21 +01:00
Lioncash
15b3de95e4
A32: Implement VNEG
2020-06-16 01:53:21 +01:00
MerryMage
2796a85096
interface/a32: Remove descriptor argument from Disassemble
2020-06-12 15:27:42 +01:00
MerryMage
3ccc415c52
emit_x64_saturation: Improve codegen for saturated result in EmitSignedSaturation
2020-06-12 15:24:37 +01:00
MerryMage
e953f67201
emit_x64_packed: PackedAbsDiffSumS8: Fix case when bits above the lower 32 bits are not zero
2020-06-12 15:24:09 +01:00
MerryMage
6cf5c78bfa
Remove .gitmodules
2020-06-11 15:15:05 +01:00
MerryMage
09867081dc
gitignore: Add build-*/
2020-06-11 15:13:38 +01:00
MerryMage
c4cf0b3e47
exception_handler_posix: Just disable fastmem if initialization fails
2020-06-10 22:52:27 +01:00
MerryMage
55bddc767f
backend/x64: Touch PEXT/PDEP code
...
* Use pext/pdep where not previously used
* Limit pext/pdep to non-AMD platforms due to slowness on AMD
* Use imul/and as alternatives for AMD and non-BMI2 platforms
2020-06-10 22:30:22 +01:00
MerryMage
f495018f53
block_of_code: Encapsulate CPU feature detection code
2020-06-09 21:25:57 +01:00
MerryMage
feddf69cb4
emit_x64_crc32: Use same constants
2020-06-06 20:46:09 +01:00
MerryMage
66a356e6cb
emit_x64_crc32: Further improvements to codegen
2020-06-06 19:04:20 +01:00
MerryMage
bb203429c6
crc32: Remove unnecessary masking
2020-06-04 20:33:46 +01:00
MerryMage
bcde135c23
emit_x64_crc32: Improve 64-bit PCLMULQDQ implementation of EmitCRC32ISO
...
Reduce number of PCLMULQDQs to 3
2020-06-04 19:23:51 +01:00
MerryMage
0f9c70ff42
emit_x64_crc32: Improve PCLMULQDQ implementation of EmitCRC32ISO
...
Remove use of pshufd
2020-06-03 18:55:58 +01:00
MerryMage
fa6aee434e
emit_x64_crc32: PCLMULQDQ implementation of EmitCRC32ISO
2020-06-03 11:16:53 +01:00
MerryMage
b47adaee1d
emit_x64_vector: SSSE3 implementation of EmitVectorExtract
2020-06-01 15:41:36 +01:00
MerryMage
f3845cea9a
A32: Implement ASIMD VQSUB instruction
2020-05-30 18:19:17 +01:00
MerryMage
16ff880f8f
A32: Implement ASIMD VQADD
2020-05-30 16:09:37 +01:00
MerryMage
174fbb74c5
simd_three_same: Use VectorSaturated{Signed,Unsigned}{Add,Sub} in SaturatingArithmeticOperation
2020-05-30 15:55:32 +01:00
MerryMage
4e90754873
IR: Implement VectorSaturated{Signed,Unsigned}{Add,Sub}
2020-05-30 15:55:32 +01:00
MerryMage
3a50d444dc
A32: Implement ASIMD VHSUB
2020-05-28 22:29:00 +01:00
MerryMage
205e6c5a56
A32: Implement ASIMD VRHADD
2020-05-28 22:29:00 +01:00
MerryMage
946eb03a3b
A32: Implement ASIMD VHADD
2020-05-28 22:29:00 +01:00
MerryMage
f8062345bb
asimd_two_regs_misc: Use {Get,Set}Vector
2020-05-28 21:05:30 +01:00
MerryMage
11cec1e3b6
asimd_three_same: Use {Get,Set}Vector
2020-05-28 21:05:16 +01:00
MerryMage
7d0b16de32
asimd_one_reg_modified_immediate: Use {Get,Set}Vector
2020-05-28 20:40:26 +01:00
MerryMage
cae857b8c8
verification_pass: Have an appropriate assertion message
2020-05-28 20:40:11 +01:00
MerryMage
ebddf6cca0
basic_block: Allow printing of invalid instruction pointers
2020-05-28 20:39:50 +01:00
MerryMage
07108246cf
A32/IR: Add SetVector and GetVector
2020-05-28 20:39:19 +01:00
MerryMage
e85a08ec34
CMakeLists: MSVC: Weaken warning level for externals
2020-05-26 20:52:06 +01:00
MerryMage
93c289b54f
Use tsl::robin_map and tsl::robin_set
...
Replace std::unordered_map and std::unordered_set with the above.
Better performance profile.
2020-05-26 20:51:48 +01:00
MerryMage
91578edc69
externals: Add robin-map
...
Merge commit '8bf66a678af746fce336851a8ddf8fa08d358a20' as 'externals/robin-map'
2020-05-26 20:51:29 +01:00
MerryMage
8bf66a678a
Squashed 'externals/robin-map/' content from commit 5cf53c6f5
...
git-subtree-dir: externals/robin-map
git-subtree-split: 5cf53c6f5d81ba31a475f66ac4a61c6f54e476d3
2020-05-26 20:51:11 +01:00
Lioncash
c4a4bdd7de
frontend: Relocate ExtReg handling to types.h
...
Same behavior, but deduplicates the code being placed across several
files
2020-05-24 23:55:47 +01:00
Lioncash
1900df5340
frontend: Relocate advanced SIMD expansion to a common file
...
Deduplicates code a little bit.
2020-05-24 23:55:47 +01:00
Lioncash
fc112e61f2
A32: Implement ASIMD modified immediate functions
...
Implements VBIC, VMOV, VMVN, and VORR modified immediate instructions.
2020-05-24 23:55:47 +01:00
