MerryMage
b178ab3bec
Replace (void)(...); idiom with UNUSED macro
2016-12-15 21:36:05 +00:00
MerryMage
276873bf70
Wrap #pragma warning with #ifdef _MSC_VER .. #endif
2016-12-15 21:36:02 +00:00
MerryMage
0e8b626d87
CMakeLists: Globally disable MSVC warning C4592
...
C4592: Symbol will be dynamically initialized (implementation limitation)
2016-12-15 21:09:55 +00:00
MerryMage
91e851a991
CMakeLists: Enable /W4 on MSVC
2016-12-15 20:52:23 +00:00
MerryMage
63caed7b09
emit_x64: Remove argument names of unused arguments
2016-12-15 20:52:22 +00:00
MerryMage
df197ff6b1
arm/types: Use smallest possible standard type that has sufficient bits for Imm{} types
2016-12-15 20:52:21 +00:00
MerryMage
546198d603
translate_arm: Mark arguments as unused
2016-12-15 20:52:20 +00:00
MerryMage
8d5522f4a0
dissassembler_arm: Support BKPT, QASX, QSAX, UQASX, UQSAX
2016-12-15 20:16:08 +00:00
Yuri Kunde Schlesner
34e19f135c
CMake: Re-use external xbyak target if present ( #62 )
2016-12-12 14:23:42 +00:00
MerryMage
5bea2e1680
block_of_code: Support stack unwinding on Windows
2016-12-12 07:49:18 +00:00
MerryMage
4962d92b79
block_of_code: Do not regenerate prelude when clearing cache
2016-12-12 07:49:18 +00:00
MerryMage
2a1cf94b1c
CMakeLists: Include backend_x64 only if we're targeting x86_64
2016-12-12 07:49:18 +00:00
MerryMage
dcc880a002
assert: _a_ expression string shouldn't be part of the format string
...
The expression may contain the % operator.
2016-12-12 07:49:18 +00:00
MerryMage
179a3388f9
block_of_code: Provide an alloc function to allocate space in the code block
2016-12-12 07:49:18 +00:00
Lioncash
f467589346
emit_x64: Remove unnecessary casts
2016-12-05 20:30:19 +00:00
Lioncash
a37631c010
emit_x64: Use reinterpret_cast for pointer casts
2016-12-05 20:30:19 +00:00
Lioncash
fafa845f64
emit_x64: Make GetBasicBlock() const qualified
2016-12-05 12:46:22 +00:00
Lioncash
6a16edc0fb
emit_x64: Move implementations into the cpp file
...
Prevents needing to rebuild everything including the emitter if any
details ever change.
2016-12-05 12:46:22 +00:00
Lioncash
282029f60a
emit_x64: Forward declare BlockOfCode
2016-12-05 12:46:22 +00:00
Lioncash
6898b74c78
emit_x64: Get rid of indirect includes
2016-12-05 12:46:22 +00:00
MerryMage
54d051977f
emit_x64: Use movdqa instead of movaps in EmitPackedSubU8
...
While movaps and movdqa are behaviourly equivalent, using movaps may incur
a domain crossing penalty on some microarchitectures. This is because
movaps is an instruction in the floating-point domain while the following
instructions are in the integer domain.
2016-12-05 01:00:51 +00:00
MerryMage
52e1445f43
Implement USUB8
2016-12-05 00:29:15 +00:00
MerryMage
5c1aab1666
Implement CLZ
...
Includes tests
2016-12-04 22:56:33 +00:00
MerryMage
1a1646d962
Implement UADD8
2016-12-04 20:52:33 +00:00
MerryMage
7cad6949e7
IR: Implement new pseudo-operation GetGEFromOp
2016-12-04 20:52:06 +00:00
MerryMage
25f21b5371
emit_x64: Inline nzcv computation into EmitFPCompare32 and EmitFPCompare64
2016-12-04 11:43:31 +00:00
MerryMage
cede5e442a
emit_x64: Use xorps/xorpd when argument to TransferToFP32/TransferToFP64 is an immediate zero
2016-12-03 11:41:10 +00:00
MerryMage
e166965f3e
Implement VCMP
2016-12-03 11:41:09 +00:00
MerryMage
f2fe376fc6
Support 64-bit immediates
2016-12-03 11:29:50 +00:00
Mat M
95f34c683c
reg_alloc: Remove unnecessary breaks after returns ( #54 )
2016-12-02 19:14:44 +00:00
Mat M
de1f831d79
microinstruction: Make use_count private ( #53 )
...
Makes the operation a part of the direct interface.
2016-11-30 21:51:06 +00:00
MerryMage
3621a925b2
reg_alloc: Register allocator related constraints belong with the rest of the register allocator
...
HostLocToReg64 contained two DEBUG_ASSERTs invloving constraints that
really belonged to the register allocator.
The register allocator prevents allocation of RSP and R15 because those
are reserved for the stack pointer and the state pointer respectively.
2016-11-30 19:42:41 +00:00
MerryMage
5f11b4f50e
HostLoc: R15 is a GPR
2016-11-30 18:38:03 +00:00
Sebastian Valle
14eb70d7e4
VFP: Fixed the VCVT behavior when converting from unsigned 32-bit values. ( #51 )
...
Use a 64-bit register to hold the values so that we don't end up interpreting them as signed values.
2016-11-27 23:25:50 +00:00
Merry
0ff8c375af
Implement UHSUB8 and UHSUB16 ( #48 )
2016-11-26 18:27:21 +00:00
Merry
cb17f9a3ed
Implement SHADD8 and SHADD16 ( #47 )
2016-11-26 18:12:29 +00:00
Sebastian Valle
11ae8d1ffa
Added disassembler support for the ARM parallel add/subtract (modulo arithmetic) instructions. ( #50 )
2016-11-26 17:58:09 +00:00
Sebastian Valle
ed71e31cea
Added disassembler support for the ARM parallel and saturated instructions ( #44 )
2016-11-26 17:49:46 +00:00
MerryMage
c0c1bb1094
Implemented UHADD16
2016-11-26 11:28:20 +00:00
Mat M
4f7dc81492
mp: Fix static_assert condition ( #46 )
...
Not an issue currently, but this would have prevented type inspection on
the last function parameter.
2016-11-25 22:09:45 +00:00
Yuri Kunde Schlesner
9ec51f74bd
libfmt: Update version to current master
2016-11-25 20:47:04 +00:00
Sebastian Valle
4d44474ad4
Implemented the ARM UHADD8 instruction. ( #45 )
...
The x64 implementation uses the SSSE3 instruction PSHUFB.
A non-SSE fallback is provided in case the CPU doesn't support it.
2016-11-25 20:32:22 +00:00
Sebastian Valle
f32921d493
ARM: Implemented UXTB16. ( #42 )
...
It passes tests.
2016-11-24 08:21:12 +00:00
Sebastian Valle
32615d0eff
Implemented the PKHTB and PKHBT instructions with tests. ( #40 )
2016-11-23 21:45:18 +00:00
MerryMage
780ff8e00e
status_register_access: SEL: Use GetGEFlags
2016-11-23 19:47:35 +00:00
MerryMage
b6f7b8babd
ir: Implement GetGEFlags, SetGEFlags
2016-11-23 19:44:27 +00:00
MerryMage
e7d02a5439
get_set_elimination_pass: Refactor CPSR related eliminations
2016-11-23 18:42:13 +00:00
Sebastian Valle
d589c63107
Implemented the ARM SEL instruction, with tests. ( #39 )
...
The test for this instruction is very peculiar. As the instruction's behavior depends on the value of the CPSR, we generate a MSR instruction after each SEL instruction to change the CPSR.
2016-11-23 18:14:07 +00:00
Mat M
65dcf45ca6
FPSCR: Mask away reserved bits ( #34 )
2016-09-21 17:51:13 +01:00
MerryMage
792f2bfd94
translate_arm: Remove unused method ArmTranslatorVisitor::LinkToNextInstruction
2016-09-21 14:07:53 +01:00
Mat M
f75acd6cfb
decoder: Generify the matcher interface ( #33 )
...
Gets rid of a bit of duplication while remaining compatible
with the current interfaces in place.
2016-09-17 09:48:18 +01:00
Mat M
943487ecee
disassembler: Provide includes to function declarations ( #32 )
2016-09-14 23:03:09 +01:00
Mat M
72897b5def
types: Provide ostream operator<< overloads where applicable ( #30 )
2016-09-07 14:21:17 +01:00
Mat M
b41de890fb
memory_pool: Deduplicate slab allocation code ( #28 )
2016-09-07 13:20:42 +01:00
Merry
d646c3119d
Merge pull request #29 from lioncash/list
...
intrusive_list: Minor changes
2016-09-07 12:10:05 +01:00
Mat M
6a2174ebfa
Add missing explicit specifiers ( #27 )
2016-09-07 12:08:48 +01:00
Mat M
6e0f27a500
types: Add helpers for determining single and doubleword extension registers ( #26 )
2016-09-07 12:08:35 +01:00
Lioncash
c052f9f84c
intrusive_list: Amend doxygen parameter documentation
2016-09-06 22:54:33 -04:00
Lioncash
1c4868ccce
intrusive_list: Correct unused variable
2016-09-06 22:54:25 -04:00
Lioncash
8fb857f9da
intrusive_list: Specify noexcept on swap implementations
...
Necessary to fully satisfy the Swappable concept.
2016-09-06 22:47:55 -04:00
Mat M
5bc9ce544f
arm_types: Move into arm folder ( #25 )
2016-09-06 00:52:33 +01:00
Mat M
b40d19c3b7
location_descriptor: Provide operator<< string overload ( #24 )
2016-09-05 21:31:25 +01:00
MerryMage
1f61a3d7bc
jitstate: Rename fields s/guest_FPSCR/FPSCR/
2016-09-05 14:42:21 +01:00
Mat M
6d53bb6d7e
arm_types: Split out LocationDescriptor ( #20 )
...
This isn't really an ARM-specific type, since it's used to indicate a
Block location.
2016-09-05 11:54:09 +01:00
Mat M
84336cf29d
value: Change Value into a class ( #19 )
...
'struct' is a little bit of a misnomer, considering it has invariants
2016-09-05 11:53:56 +01:00
Mat M
858796a029
Eliminate variable shadowing warnings with MSVC ( #17 )
2016-09-04 11:30:57 +01:00
Mat M
7f9a0c3c38
Remove unnecessary explicit includes ( #16 )
2016-09-03 21:48:03 +01:00
Mat M
26db11cd71
reg_alloc: Use a strongly-typed enum for representing OpArg type ( #15 )
2016-09-03 18:30:03 +01:00
Mat M
05b189bc26
arm_types: Specialize std::hash for LocationDescriptor ( #14 )
...
Same thing, but with the benefit of working with anything that uses
std::hash by default.
2016-09-03 12:48:47 +01:00
Mat M
8c4df46580
FPSCR: Make value constructor explicit ( #13 )
...
Maintains consistency between the PSR helper.
2016-09-03 12:48:31 +01:00
Mat M
3e03524658
assert: Use attribute specifier syntax with non MSVC compilers ( #12 )
2016-09-03 12:48:07 +01:00
MerryMage
cc3e7e71aa
bit_util: std::bitset-based BitCount implementation
...
Suggestion by @lioncash.
2016-09-02 22:00:48 +01:00
Mat M
5aa4f753b6
load_store: Add checks for unpredictability to other singular store instructions ( #11 )
2016-09-02 21:10:28 +01:00
MerryMage
e8764c129f
bit_util: Implement BitCount portably
2016-09-02 19:05:49 +01:00
Mat M
6ec651498d
arm: Add PSR helper type ( #3 )
2016-09-02 17:34:33 +01:00
Mat M
00d0f4d5ff
load_store: Add correctness checks for STRD variants ( #7 )
...
STRD doesn't allow the use of the PC in either Rt or Rt2
2016-09-02 17:32:02 +01:00
Mat M
d16badbc04
get_set_elimination_pass: Replace decltype with direct type retrieval ( #9 )
2016-09-02 17:30:21 +01:00
Mat M
1e781d911a
reg_alloc: const correctness ( #8 )
2016-09-02 17:30:01 +01:00
MerryMage
ba04be5071
travis: Build on OS X
2016-09-02 17:08:09 +01:00
MerryMage
b3743e9453
Revert "arm_types: Don't use std::hash<u64>() for LocationDescriptorHash"
...
This reverts commit 519c714dbc
.
2016-09-02 14:33:56 +01:00
MerryMage
519c714dbc
arm_types: Don't use std::hash<u64>() for LocationDescriptorHash
...
Apple Clang (clang-600.0.54 on x86_64-apple-darwin13.4.0) complains with:
implicit instantiation of undefined template 'std::__1::hash<unsigned long long>'
2016-09-02 12:45:09 +01:00
Mat M
a465b2ddbc
ir_emitter: Fix typo. ClearExlcusive -> ClearExclusive ( #5 )
2016-09-02 12:17:22 +01:00
Mat M
ea157dfd52
translate_arm: const-correctness ( #6 )
2016-09-02 12:17:02 +01:00
MerryMage
711b3e29d3
interface: Allow ClearCache to be called at any time
2016-09-02 10:59:33 +01:00
Mat M
fb6d838bd9
dynarmic: Remove poison_memory ClearCache parameter ( #1 )
...
Unused since the switch to Xbyak
2016-09-01 09:47:09 +01:00
Mat M
7e3c981974
translate: Forward declare LocationDescriptor ( #2 )
2016-09-01 09:46:35 +01:00
MerryMage
4321e829d1
callbacks: Add user_arg argument to InterpreterFallback
2016-09-01 02:00:08 +01:00
MerryMage
3b5c43b427
Optimization: Read page-table directly for memory access
2016-09-01 00:58:02 +01:00
MerryMage
57169ec093
abi: Implement ABI_PushCallerSaveRegistersAndAdjustStack and ABI_PopCallerSaveRegistersAndAdjustStack
2016-09-01 00:57:22 +01:00
MerryMage
702e181b35
backend_x64/abi: Reversing XMM list leads to incorrect ordering
2016-08-31 23:06:49 +01:00
MerryMage
b10c438e8e
jitstate: Remove code argument from ResetRSB
2016-08-31 21:57:33 +01:00
Lioncash
ea6a4e82b5
block_of_code: Make CallFunction accept function pointers only
2016-08-31 21:51:44 +01:00
Lioncash
37d64f0c86
hostloc: Simplify static_assert
2016-08-28 22:10:23 +01:00
Lioncash
f2bf795876
intrusive_list: Interface changes
...
- Remove the root pointer from iterators.
This is unnecessary, since the only way to get a valid iterator is
either from a node itself (it transiently becomes an iterator via the
underlying interface), or through the iterator interface for the list.
This should also result in better code generation, as each increment or
decrement of an iterator is now branchless.
- Remove iterator_to
This is actually a pretty dangerous function, since it would immediately
create an iterator into the list using the given item, even if it's not
actually part of the list. This was only left around due to lack of
type handling around constructors.
- Add other overloads for erase() and remove()
Now handles iterators, pointers, and references.
2016-08-28 20:56:40 +01:00
MerryMage
7912a79fa5
emit_x64: align before emitting blocks
2016-08-27 11:04:43 +01:00
MerryMage
41c8dabf0b
block_of_code: nop should probably default to a size of 1
2016-08-27 10:57:48 +01:00
MerryMage
dca3b2f079
Implement VMRS and VMSR
2016-08-26 22:47:54 +01:00
MerryMage
814348371e
emit_x64: EmitX64::Emit: block.Location() returns by value
2016-08-26 19:43:29 +01:00
Lioncash
79545661b3
intrusive_list: De-duplicate some iterator code
...
These increment/decrement variants can just leverage the other
overloads.
2016-08-26 19:15:11 +01:00
MerryMage
4f6ea715b2
emit_x64: EmitX64::Emit doesn't need descriptor argument
2016-08-26 19:14:25 +01:00
Lioncash
32c24d2cb3
Use 'false' instead of '0' in asserts
2016-08-26 18:52:08 +01:00
MerryMage
ba31f43672
reg_alloc: UseDefOpArgXmm: default value for argument desired_location should be any_xmm, not any_gpr
2016-08-26 18:50:08 +01:00
MerryMage
7fedf04e79
reg_alloc: Deduplicate constants in RegAlloc::HostCall that were already defined by abi.h
2016-08-26 18:43:50 +01:00
MerryMage
59a8e14d1c
reg_alloc: Correct OpArg::setBit for Reg
2016-08-26 15:23:38 +01:00
MerryMage
065c53ebfc
emit_x64: Make ZeroIfNaN64 branchless
2016-08-26 15:23:08 +01:00
MerryMage
9901ed0f51
block_of_code: Optimize nops
2016-08-26 13:46:19 +01:00
Lioncash
0102951bdd
Convert formatting over to fmtlib
2016-08-26 13:13:19 +01:00
Lioncash
ee4b30eee4
externals: Add fmt as a submodule
2016-08-26 13:13:19 +01:00
MerryMage
ed3a686d1d
Implement public header files
2016-08-26 00:44:50 +01:00
MerryMage
656d4f7252
emit_x64: inhibit_emission is obsolete
...
Not used anymore; unused ever since intrusive lists were introduced.
2016-08-25 23:24:16 +01:00
MerryMage
4322c0907c
microinstruction: Rename FindUseWithOpcode to GetAssociatedPseudoOperation, encapsulate associated variables
2016-08-25 21:08:47 +01:00
MerryMage
30df51c2dc
ir_emitter: Should be in the IR namespace, not the Arm namespace
2016-08-25 17:36:42 +01:00
MerryMage
922d1fd198
Merge branch 'xbyak'
2016-08-25 16:54:48 +01:00
MerryMage
d04b9eaa81
backend_x64/block_of_code: Reset labels when ClearCache() is called
2016-08-25 16:18:18 +01:00
MerryMage
e32812cd00
Port x64 backend to xbyak
2016-08-25 16:18:17 +01:00
Lioncash
0e12fb6a56
basic_block: Move all variables behind a public interface
2016-08-25 16:14:37 +01:00
Lioncash
1d8432487d
arm_types: Provide the not-equals operator overload for LocationDescriptor
...
Generally if == has an overload, != should be provided for symmetry.
2016-08-25 14:08:16 +01:00
MerryMage
13908c5a58
reg_alloc: Insert braces around DEBUG_ASSERT
...
DEBUG_ASSERT becomes an empty statement in release-mode; an if statement
with an empty statement produces a compiler warning.
2016-08-25 13:09:18 +01:00
MerryMage
dc26afbd7e
translate_arm: Translate more than one conditional instruction in a block
2016-08-25 13:05:33 +01:00
MerryMage
aa9b63bac4
basic_block: DumpBlock now dumps terminal details
2016-08-25 13:01:32 +01:00
Lioncash
1395baefa9
interface: Return register files by const reference
...
Prevents unnecessary copies where they aren't particularly required.
2016-08-25 12:51:41 +01:00
Lioncash
37755cbfec
translate: Simplify function pointer calls
...
They can just be called like regular functions
2016-08-24 23:19:50 +01:00
Lioncash
9b874c2e23
CMakeLists: Add FPSCR.h to the list of headers
...
Whoops, that one's on me
2016-08-24 23:19:49 +01:00
MerryMage
22cca5ff72
emit_x64: Actually advance RSB pointer
2016-08-24 23:19:47 +01:00
Lioncash
eba3a06d80
frontend: Introduce FPSCR register helper class
...
Encapsulates all of the FPSCR state.
2016-08-24 20:51:14 +01:00
MerryMage
b5a86889cd
Implement VCVT
2016-08-23 22:20:04 +01:00
MerryMage
445aad0639
x64/emitter: Add opBits argument to CVTSI2SS and CVTSI2SD
2016-08-23 21:58:34 +01:00
MerryMage
78464a8f01
translate_arm/vfp2: Implement VSTM (A1, A2)
2016-08-23 20:54:38 +01:00
MerryMage
a96704eb0f
arm_types: new_reg >= 0 is always true since new_reg is unsigned
2016-08-23 20:11:41 +01:00
MerryMage
7a01dba3c4
arm_types: Change type signature of operator+ to size_t instead of int
2016-08-23 20:07:53 +01:00
MerryMage
af9a68f0d1
translate_arm/vfp2: Implement VLDM (A1, A2)
2016-08-23 20:07:06 +01:00
Lioncash
d5805cc6eb
intrusive_list: Add size querying
...
Since we store pointers and have an interface for iterators
set up, the count is just the distance from the beginning
to the end of the list.
Nice thing is that because of this, basic blocks also get
the ability to have a size count without needing to do anything
directly.
2016-08-23 19:52:09 +01:00
Lioncash
2180a4be7a
basic_block: Use a range-based for loop for iteration
2016-08-23 19:51:01 +01:00
Lioncash
897b776250
string_util: Use C++ attribute specifier for format strings
...
This is also compatible with both clang and GCC
2016-08-23 19:38:48 +01:00
Lioncash
867d345fdc
disassembler: Deduplicate SignStr
...
Also just makes it return a character, rather than a pointer to a
string.
2016-08-23 16:40:33 +01:00
Lioncash
8bed891011
x64 emitter: Fix swapped parameter names
2016-08-23 16:39:38 +01:00
MerryMage
c8b2f63c93
get_set_elimination_pass: Eliminate unnecessary gets/sets of extended registers
2016-08-23 15:57:20 +01:00
MerryMage
e0f9dead5d
microinstruction: Identity's type depends on the type of its argument
2016-08-23 15:48:30 +01:00
Lioncash
67706c208b
assert: Use false in asserts rather than 0
...
Quiets extended warnings.
2016-08-23 14:31:54 +01:00
MerryMage
8c7a81a308
VPOP and VPUSH are floating-point load-store instructions
2016-08-23 14:26:50 +01:00
MerryMage
34cffa86a4
dead_code_elimination_pass: Update to use IR::Inst::MayHaveSideEffects
2016-08-23 13:12:14 +01:00
Lioncash
46573eb538
intrusive_list: Add insert_before() and insert_after() helper functions
...
Small helpers for inserting nodes before and after an existing one.
insert() is the same as insert_before(), so insert() is just made
to be an alias of this.
2016-08-23 12:38:57 +01:00
MerryMage
8d1b9f32ca
Standardize indentation of switch statments
2016-08-23 12:19:27 +01:00
MerryMage
2471be317e
arm_types: Implement LocationDescription::FPSCR_RMode
2016-08-23 02:22:04 +01:00
Lioncash
47f285249b
microinstruction: Introduce convenience informational functions
...
Whenever more rigorous optimizations are attempted (or even basic ones),
it's usually helpful to know what overall kind of instruction is being
dealt with, in the event certain classes of instructions may be eligible
for optimization.
2016-08-22 21:36:48 +01:00
Lioncash
06ec4b5977
microinstruction: Make constructor explicit
2016-08-22 16:01:18 +01:00
Lioncash
1bedd3bd7f
CMakeLists: Clean up
...
Moves functions out of the main CMakeLists file into module files that
can just be included whenever necessary. This also uses the CMake
provided variables for enforcing compiler requirements.
2016-08-22 15:55:39 +01:00
MerryMage
72250b119f
backend_x64/block_of_code: Add more floating point constants
...
* MFloatPositiveZero32
* MFloatPositiveZero64
* MFloatMinS32
* MFloatMaxS32
* MFloatMinU32
* MFloatMaxU32
2016-08-22 15:54:19 +01:00
MerryMage
a32689c832
x64/emitter: Implement CMPxxSD instructions
2016-08-22 15:54:18 +01:00
MerryMage
843d29b5a9
translate_arm/branch: Read-after-write in arm_BLX_reg
...
When BLX LR is translated, BXWritePC(GetRegister(Reg::LR)) was executed
after the SetRegister(Reg::LR, _) update was done.
2016-08-22 15:53:56 +01:00
MerryMage
d8bee60947
translate_thumb: Read-after-write in thumb16_BLX_reg
...
When the instruction BLX LR is translated, BXWritePC(GetRegister(Reg::LR))
was executed after the SetRegister(Reg::LR, _) update was performed.
2016-08-22 14:28:51 +01:00
Lioncash
1abe881921
basic_block: Add proxy member functions for the instruction list
...
Currently basic block kind of acts like a 'dumb struct' which makes things
a little more verbose to write (as opposed to keeping it all in one place,
I guess). It's also a little wonky conceptually, considering a block is
composed of instructions (i.e. 'contains' them).
So providing accessors that make it act more like a container can make working
with algorithms a little nicer. It also makes the API a little more
defined.
Ideally, the list would be only available through a function, but
currently, the pool allocator is exposed, which seems somewhat odd,
considering the block itself should manage its overall allocations
(with placement new, and regular new), rather than putting that
sanitizing directly on the IR emitter (it should just care about emission,
not block state). However, recontaining that can be followed up with,
as it's very trivial to do.
2016-08-22 13:44:56 +01:00
Lioncash
226d66dd5b
intrusive_list: satisfy the Swappable concept
2016-08-22 12:38:16 +01:00
Lioncash
2a9fdacc60
intrusive_list: move iterator implementation above list
...
Will make keeping non-member list functions easier to keep together with
the class.
2016-08-22 12:38:16 +01:00
Lioncash
669ffb5f3a
intrusive_list: Add pop_back(), pop_front(), front(), and back() member functions
2016-08-20 21:26:16 +01:00
Lioncash
86f803da04
reg_alloc: Use Inst's HasUses() function where applicable
2016-08-20 21:26:09 +01:00
Lioncash
a8ba15f0d5
intrusive_list: Make Remove and IsEmpty stdlib compatible
...
Makes the name match the standard library equivalents.
C++17 introduces non-member empty() which allows for nicer handling
in generic contexts. May as well make the data structure compatible with
it.
2016-08-19 20:25:18 +01:00
Lioncash
23d190f7b0
intrusive_list: Support inserters
...
Allows std::inserter, std::back_inserter, and std::front_inserter to work
with intrusive lists.
2016-08-19 20:25:17 +01:00
Lioncash
36a0ad5bc2
reg_alloc: const correctness for ValueLocation()
2016-08-19 19:33:57 +01:00
MerryMage
2d6a86e43c
Remove <cassert>
2016-08-19 01:53:24 +01:00
MerryMage
192a0029be
ir/opcodes: Implement IR::AreTypesCompatible
...
Type-checking is now occuring in more than one place.
2016-08-19 01:34:14 +01:00
Tillmann Karras
9782e7da3f
verification_pass: show type errors
2016-08-19 01:17:30 +01:00
Tillmann Karras
dad7724b86
TranlateArm: implement remaining multiplies
...
SMLALxy, SMLAxy, SMULxy SMLAWy, SMULWy, SMLAD, SMLALD, SMLSD, SMLSLD,
SMUAD, SMUSD
2016-08-19 01:08:38 +01:00
MerryMage
fe15cbd50e
translate_arm/parallel: Detect UNPREDICTABLE instructions
2016-08-19 00:59:07 +01:00
MerryMage
2119dfc926
translate_arm/multiply: MLA is UNPREDICTABLE when Ra == R15
2016-08-19 00:59:05 +01:00
MerryMage
0d0f4b1b4f
translate_arm/load_store: Correct implementation for LDM*
2016-08-19 00:59:04 +01:00
MerryMage
4acc481463
translate_arm/load_store: Handle unpredictable instructions
...
This necessated handling literal versions of the instructions separately
as they had different requirements. The rationale for detecting
unpredictable instructions is because:
a. they are unlikely to be outputted by a well-behaved compiler
b. their behaviour may change between different processors
I would rather unpredictable instructions fail loudly than silently do
approximately the right thing.
2016-08-19 00:59:02 +01:00
MerryMage
5869e79b9c
translate_arm: Simplify EmitImmShift and EmitRegShift
2016-08-19 00:21:31 +01:00
Lioncash
fe9329ef3e
intrusive_list: Add list class type definitions; extend iterator interface
...
Adds type definitions, and extends the list interface to support all
standard library forms of iterator creation.
2016-08-18 23:47:26 +01:00
Lioncash
95a83543f2
intrusive_list: Get rid of unnecessary static_casts
...
The only valid objects to add to the list are those that inherit from
IntrusiveListNode. Therefore anything being added to the list that isn't
inheriting from it will cause compilation to fail.
2016-08-18 23:47:26 +01:00
Lioncash
67509935f6
intrusive_list: Eliminate need for separate const iterator construct
...
This generalizes the regular iterator to be compatible with both use
cases. Passing in the list instance directly isn't needed, because the
only way you'd ever get a valid instantiation of an iterator is from a
list instance itself.
2016-08-18 23:47:26 +01:00
MerryMage
b8cf43c43e
translate_arm/data_processing: Rd == R15 is unpredictable for rsr instructions
2016-08-18 18:23:05 +01:00
MerryMage
efc8d2f772
arm_translator: NV conditional is obsolete
2016-08-18 18:21:48 +01:00
MerryMage
5f7d940fde
disassemble_arm: Partially implement coprocessor and hint instructions
2016-08-18 18:21:16 +01:00
MerryMage
36a916a766
decoder/arm: Correct NOP decoder
2016-08-18 18:20:29 +01:00
MerryMage
e9e7ac6e65
decoder/arm: Correct PLD decoder for v6K
2016-08-18 18:19:34 +01:00
MerryMage
269160ef0d
emit_x64: Clear RSB-related caches when ClearCache() is called
2016-08-18 18:18:44 +01:00
MerryMage
1a3f3ac435
emit_x64: Correct behaviour of PackedOperation for immediate argument
...
x64 MOVD_xmm does not support an immediate oparg
2016-08-18 18:17:17 +01:00
MerryMage
b2de47954b
EmitX64: Emit correct cycle count on cond failure
2016-08-18 18:16:18 +01:00
Lioncash
841098a0bc
ir: separate components out a little more
2016-08-17 20:46:21 +01:00
Lioncash
9690d1423d
intrusive_list: explicitly default relevant constructors
2016-08-17 20:46:11 +01:00
Lioncash
cbd99e4367
jitstate: Use std::array's fill() in ResetRSB
...
Performs the equivalent behavior
2016-08-17 10:10:43 +01:00
Lioncash
74ee92ee38
jitstate: const correctness
...
GetReturnFromRunCodeAddress is const qualified, so this can accept a const
pointer. This also allows for making the constructor accept a const
pointer as well.
2016-08-17 10:10:43 +01:00
Lioncash
9ed9f4c565
mp: Generalize function information retrieval
...
Generalizes MemFnInfo to be compatible with all function types.
Also adds type introspection for arguments, as well as helper templates for the common types supported by all partial specializations.
2016-08-17 10:08:40 +01:00
Lioncash
439619c827
reg_alloc: Make GetRegLoc return by const reference
...
Considering a HostLocInfo instance houses a std::vector, every time this
function is called can cause a potential heap allocation.
This can be somewhat unnecessary because this function is only used to query
for information we already have.
Considering this is used by several other internal query functions such as
IsRegisterOccupied, IsRegisterAllocated, and IsLastUse, this will result
in better codegen (returning an address is just 3 instructions excluding
the ret instruction for returning, meanwhile heap alloc can be 60+).
This also renames the function to have the same name as its non-const
counterpart, since overloading will just select the correct function
instead of putting that onus on the developer.
2016-08-17 10:08:08 +01:00
MerryMage
0ebb572e2d
Optimization: Make RSB a ring buffer instead of a stack
2016-08-15 15:48:22 +01:00
MerryMage
7d7ac0af71
Optimization: Make SVC use RSB
2016-08-15 15:02:08 +01:00
MerryMage
6c45619aa1
Optimization: Implement terminal LinkBlockFast
2016-08-15 14:33:17 +01:00
MerryMage
624e84fa09
Optimization: Tweak RSB
2016-08-15 14:08:06 +01:00
MerryMage
070298b948
Optimization: bugfix! Return Stack Buffer location hash calculation was incorrect
2016-08-15 13:21:58 +01:00
MerryMage
e164ede4dc
TranslateArm: Implement MRS, MSR (imm), MSR (reg)
2016-08-15 11:50:49 +01:00
bunnei
30f3d869cc
TranslateArm: Implement VPUSH and VPOP.
2016-08-13 19:37:03 +01:00
MerryMage
9c82a12f8f
ir_opt: Update VerificationPass to current IR
2016-08-13 18:39:49 +01:00
MerryMage
8fc21f481a
RegAlloc: Handle case when def is unused
2016-08-13 01:55:03 +01:00
MerryMage
d43d97b990
EmitX64/EmitPushRSB: Assert that patch location is of correct size
2016-08-13 00:52:31 +01:00
MerryMage
960d14d18e
Optimization: Implement Return Stack Buffer
2016-08-13 00:10:23 +01:00
bunnei
8e68e6fdd9
TranslateArm: Implement QADD16/QSUB16/UQADD16/UQSUB16.
2016-08-12 19:00:44 +01:00
bunnei
4b09c0d032
TranslateArm: Implement QADD8 and UQADD8.
2016-08-12 19:00:44 +01:00
bunnei
127fbe99cb
TranslateArm: Implement QSUB8.
2016-08-12 19:00:44 +01:00
bunnei
86fe29c6d2
TranslateArm: Implement UQSUB8.
2016-08-12 19:00:44 +01:00